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+/*
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+ * arch/arm/plat-omap/include/mach/mux.h
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+ *
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+ * Table of the Omap register configurations for the FUNC_MUX and
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+ * PULL_DWN combinations.
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+ *
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+ * Copyright (C) 2004 - 2008 Texas Instruments Inc.
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+ * Copyright (C) 2003 - 2008 Nokia Corporation
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+ *
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+ * Written by Tony Lindgren
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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+ *
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+ * NOTE: Please use the following naming style for new pin entries.
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+ * For example, W8_1610_MMC2_DAT0, where:
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+ * - W8 = ball
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+ * - 1610 = 1510 or 1610, none if common for both 1510 and 1610
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+ * - MMC2_DAT0 = function
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+ */
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+
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+#ifndef __ASM_ARCH_MUX_H
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+#define __ASM_ARCH_MUX_H
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+
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+#define PU_PD_SEL_NA 0 /* No pu_pd reg available */
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+#define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */
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+
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+#ifdef CONFIG_OMAP_MUX_DEBUG
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+#define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
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+ .mux_reg = FUNC_MUX_CTRL_##reg, \
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+ .mask_offset = mode_offset, \
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+ .mask = mode,
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+
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+#define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \
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+ .pull_reg = PULL_DWN_CTRL_##reg, \
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+ .pull_bit = bit, \
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+ .pull_val = status,
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+
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+#define PU_PD_REG(reg, status) .pu_pd_name = "PU_PD_SEL_"#reg, \
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+ .pu_pd_reg = PU_PD_SEL_##reg, \
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+ .pu_pd_val = status,
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+
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+#define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \
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+ .mux_reg = OMAP7XX_IO_CONF_##reg, \
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+ .mask_offset = mode_offset, \
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+ .mask = mode,
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+
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+#define PULL_REG_7XX(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \
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+ .pull_reg = OMAP7XX_IO_CONF_##reg, \
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+ .pull_bit = bit, \
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+ .pull_val = status,
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+
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+#else
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+
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+#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
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+ .mask_offset = mode_offset, \
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+ .mask = mode,
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+
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+#define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \
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+ .pull_bit = bit, \
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+ .pull_val = status,
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+
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+#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \
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+ .pu_pd_val = status,
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+
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+#define MUX_REG_7XX(reg, mode_offset, mode) \
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+ .mux_reg = OMAP7XX_IO_CONF_##reg, \
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+ .mask_offset = mode_offset, \
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+ .mask = mode,
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+
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+#define PULL_REG_7XX(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \
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+ .pull_bit = bit, \
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+ .pull_val = status,
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+
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+#endif /* CONFIG_OMAP_MUX_DEBUG */
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+
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+#define MUX_CFG(desc, mux_reg, mode_offset, mode, \
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+ pull_reg, pull_bit, pull_status, \
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+ pu_pd_reg, pu_pd_status, debug_status) \
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+{ \
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+ .name = desc, \
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+ .debug = debug_status, \
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+ MUX_REG(mux_reg, mode_offset, mode) \
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+ PULL_REG(pull_reg, pull_bit, pull_status) \
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+ PU_PD_REG(pu_pd_reg, pu_pd_status) \
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+},
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+
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+
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+/*
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+ * OMAP730/850 has a slightly different config for the pin mux.
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+ * - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and
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+ * not the FUNC_MUX_CTRL_x regs from hardware.h
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+ * - for pull-up/down, only has one enable bit which is is in the same register
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+ * as mux config
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+ */
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+#define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \
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+ pull_bit, pull_status, debug_status)\
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+{ \
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+ .name = desc, \
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+ .debug = debug_status, \
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+ MUX_REG_7XX(mux_reg, mode_offset, mode) \
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+ PULL_REG_7XX(mux_reg, pull_bit, pull_status) \
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+ PU_PD_REG(NA, 0) \
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+},
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+
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+struct pin_config {
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+ char *name;
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+ const unsigned int mux_reg;
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+ unsigned char debug;
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+
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+ const unsigned char mask_offset;
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