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@@ -185,3 +185,172 @@ struct uart_pram {
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/*****************************************************************
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+ BISYNC parameter RAM
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+*****************************************************************/
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+
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+struct bisync_pram {
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+ /*
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+ * SCC parameter RAM
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+ */
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+ unsigned short rbase; /* RX BD base address */
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+ unsigned short tbase; /* TX BD base address */
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+ unsigned char rfcr; /* Rx function code */
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+ unsigned char tfcr; /* Tx function code */
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+ unsigned short mrblr; /* Rx buffer length */
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+ unsigned long rstate; /* Rx internal state */
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+ unsigned long rptr; /* Rx internal data pointer */
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+ unsigned short rbptr; /* rb BD Pointer */
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+ unsigned short rcount; /* Rx internal byte count */
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+ unsigned long rtemp; /* Rx temp */
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+ unsigned long tstate; /* Tx internal state */
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+ unsigned long tptr; /* Tx internal data pointer */
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+ unsigned short tbptr; /* Tx BD pointer */
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+ unsigned short tcount; /* Tx byte count */
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+ unsigned long ttemp; /* Tx temp */
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+ unsigned long rcrc; /* temp receive CRC */
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+ unsigned long tcrc; /* temp transmit CRC */
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+
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+ /*
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+ * BISYNC specific parameter RAM
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+ */
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+ unsigned char RESERVED1[4]; /* Reserved area */
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+ unsigned long crcc; /* CRC Constant Temp Value */
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+ unsigned short prcrc; /* Preset Receiver CRC-16/LRC */
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+ unsigned short ptcrc; /* Preset Transmitter CRC-16/LRC */
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+ unsigned short parec; /* Receive Parity Error Counter */
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+ unsigned short bsync; /* BISYNC SYNC Character */
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+ unsigned short bdle; /* BISYNC DLE Character */
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+ unsigned short cc[8]; /* Rx control characters */
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+ unsigned short rccm; /* Receive Control Character Mask */
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+};
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+
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+/*****************************************************************
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+ IOM2 parameter RAM
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+ (overlaid on tx bd[5] of SCC channel[2])
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+*****************************************************************/
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+struct iom2_pram {
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+ unsigned short ci_data; /* ci data */
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+ unsigned short monitor_data; /* monitor data */
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+ unsigned short tstate; /* transmitter state */
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+ unsigned short rstate; /* receiver state */
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+};
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+
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+/*****************************************************************
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+ SPI/SMC parameter RAM
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+ (overlaid on tx bd[6,7] of SCC channel[2])
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+*****************************************************************/
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+
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+#define SPI_R 0x8000 /* Ready bit in BD */
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+
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+struct spi_pram {
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+ unsigned short rbase; /* Rx BD Base Address */
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+ unsigned short tbase; /* Tx BD Base Address */
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+ unsigned char rfcr; /* Rx function code */
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+ unsigned char tfcr; /* Tx function code */
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+ unsigned short mrblr; /* Rx buffer length */
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+ unsigned long rstate; /* Rx internal state */
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+ unsigned long rptr; /* Rx internal data pointer */
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+ unsigned short rbptr; /* rb BD Pointer */
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+ unsigned short rcount; /* Rx internal byte count */
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+ unsigned long rtemp; /* Rx temp */
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+ unsigned long tstate; /* Tx internal state */
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+ unsigned long tptr; /* Tx internal data pointer */
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+ unsigned short tbptr; /* Tx BD pointer */
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+ unsigned short tcount; /* Tx byte count */
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+ unsigned long ttemp; /* Tx temp */
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+};
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+
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+struct smc_uart_pram {
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+ unsigned short rbase; /* Rx BD Base Address */
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+ unsigned short tbase; /* Tx BD Base Address */
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+ unsigned char rfcr; /* Rx function code */
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+ unsigned char tfcr; /* Tx function code */
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+ unsigned short mrblr; /* Rx buffer length */
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+ unsigned long rstate; /* Rx internal state */
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+ unsigned long rptr; /* Rx internal data pointer */
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+ unsigned short rbptr; /* rb BD Pointer */
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+ unsigned short rcount; /* Rx internal byte count */
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+ unsigned long rtemp; /* Rx temp */
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+ unsigned long tstate; /* Tx internal state */
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+ unsigned long tptr; /* Tx internal data pointer */
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+ unsigned short tbptr; /* Tx BD pointer */
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+ unsigned short tcount; /* Tx byte count */
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+ unsigned long ttemp; /* Tx temp */
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+ unsigned short max_idl; /* Maximum IDLE Characters */
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+ unsigned short idlc; /* Temporary IDLE Counter */
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+ unsigned short brkln; /* Last Rx Break Length */
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+ unsigned short brkec; /* Rx Break Condition Counter */
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+ unsigned short brkcr; /* Break Count Register (Tx) */
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+ unsigned short r_mask; /* Temporary bit mask */
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+};
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+
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+struct smc_trnsp_pram {
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+ unsigned short rbase; /* rx BD Base Address */
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+ unsigned short tbase; /* Tx BD Base Address */
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+ unsigned char rfcr; /* Rx function code */
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+ unsigned char tfcr; /* Tx function code */
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+ unsigned short mrblr; /* Rx buffer length */
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+ unsigned long rstate; /* Rx internal state */
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+ unsigned long rptr; /* Rx internal data pointer */
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+ unsigned short rbptr; /* rb BD Pointer */
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+ unsigned short rcount; /* Rx internal byte count */
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+ unsigned long rtemp; /* Rx temp */
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+ unsigned long tstate; /* Tx internal state */
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+ unsigned long tptr; /* Tx internal data pointer */
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+ unsigned short tbptr; /* Tx BD pointer */
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+ unsigned short tcount; /* Tx byte count */
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+ unsigned long ttemp; /* Tx temp */
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+ unsigned short reserved[5]; /* Reserved */
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+};
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+
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+struct idma_pram {
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+ unsigned short ibase; /* IDMA BD Base Address */
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+ unsigned short ibptr; /* IDMA buffer descriptor pointer */
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+ unsigned long istate; /* IDMA internal state */
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+ unsigned long itemp; /* IDMA temp */
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+};
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+
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+struct ethernet_pram {
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+ /*
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+ * SCC parameter RAM
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+ */
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+ unsigned short rbase; /* RX BD base address */
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+ unsigned short tbase; /* TX BD base address */
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+ unsigned char rfcr; /* Rx function code */
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+ unsigned char tfcr; /* Tx function code */
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+ unsigned short mrblr; /* Rx buffer length */
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+ unsigned long rstate; /* Rx internal state */
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+ unsigned long rptr; /* Rx internal data pointer */
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+ unsigned short rbptr; /* rb BD Pointer */
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+ unsigned short rcount; /* Rx internal byte count */
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+ unsigned long rtemp; /* Rx temp */
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+ unsigned long tstate; /* Tx internal state */
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+ unsigned long tptr; /* Tx internal data pointer */
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+ unsigned short tbptr; /* Tx BD pointer */
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+ unsigned short tcount; /* Tx byte count */
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+ unsigned long ttemp; /* Tx temp */
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+ unsigned long rcrc; /* temp receive CRC */
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+ unsigned long tcrc; /* temp transmit CRC */
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+
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+ /*
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+ * ETHERNET specific parameter RAM
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+ */
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+ unsigned long c_pres; /* preset CRC */
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+ unsigned long c_mask; /* constant mask for CRC */
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+ unsigned long crcec; /* CRC error counter */
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+ unsigned long alec; /* alighnment error counter */
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+ unsigned long disfc; /* discard frame counter */
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+ unsigned short pads; /* short frame PAD characters */
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+ unsigned short ret_lim; /* retry limit threshold */
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+ unsigned short ret_cnt; /* retry limit counter */
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+ unsigned short mflr; /* maximum frame length reg */
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+ unsigned short minflr; /* minimum frame length reg */
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+ unsigned short maxd1; /* maximum DMA1 length reg */
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+ unsigned short maxd2; /* maximum DMA2 length reg */
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+ unsigned short maxd; /* rx max DMA */
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+ unsigned short dma_cnt; /* rx dma counter */
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+ unsigned short max_b; /* max bd byte count */
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+ unsigned short gaddr1; /* group address filter 1 */
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+ unsigned short gaddr2; /* group address filter 2 */
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+ unsigned short gaddr3; /* group address filter 3 */
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+ unsigned short gaddr4; /* group address filter 4 */
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王隽