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@@ -220,3 +220,74 @@
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#define EXYNOS4_PA_SPDIF 0x139B0000
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+#define EXYNOS4_PA_TIMER 0x139D0000
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+#define EXYNOS5_PA_TIMER 0x12DD0000
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+
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+#define EXYNOS4_PA_SDRAM 0x40000000
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+#define EXYNOS5_PA_SDRAM 0x40000000
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+
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+/* Compatibiltiy Defines */
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+
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+#define S3C_PA_HSMMC0 EXYNOS4_PA_HSMMC(0)
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+#define S3C_PA_HSMMC1 EXYNOS4_PA_HSMMC(1)
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+#define S3C_PA_HSMMC2 EXYNOS4_PA_HSMMC(2)
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+#define S3C_PA_HSMMC3 EXYNOS4_PA_HSMMC(3)
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+#define S3C_PA_IIC EXYNOS4_PA_IIC(0)
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+#define S3C_PA_IIC1 EXYNOS4_PA_IIC(1)
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+#define S3C_PA_IIC2 EXYNOS4_PA_IIC(2)
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+#define S3C_PA_IIC3 EXYNOS4_PA_IIC(3)
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+#define S3C_PA_IIC4 EXYNOS4_PA_IIC(4)
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+#define S3C_PA_IIC5 EXYNOS4_PA_IIC(5)
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+#define S3C_PA_IIC6 EXYNOS4_PA_IIC(6)
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+#define S3C_PA_IIC7 EXYNOS4_PA_IIC(7)
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+#define S3C_PA_RTC EXYNOS4_PA_RTC
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+#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
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+#define S3C_PA_SPI0 EXYNOS4_PA_SPI0
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+#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
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+#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
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+#define S3C_PA_USB_HSOTG EXYNOS4_PA_HSOTG
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+
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+#define S5P_PA_EHCI EXYNOS4_PA_EHCI
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+#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
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+#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1
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+#define S5P_PA_FIMC2 EXYNOS4_PA_FIMC2
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+#define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3
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+#define S5P_PA_JPEG EXYNOS4_PA_JPEG
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+#define S5P_PA_G2D EXYNOS4_PA_G2D
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+#define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0
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+#define S5P_PA_HDMI EXYNOS4_PA_HDMI
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+#define S5P_PA_IIC_HDMIPHY EXYNOS4_PA_IIC_HDMIPHY
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+#define S5P_PA_MFC EXYNOS4_PA_MFC
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+#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0
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+#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1
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+#define S5P_PA_MIXER EXYNOS4_PA_MIXER
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+#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND
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+#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
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+#define S5P_PA_SDO EXYNOS4_PA_SDO
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+#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
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+#define S5P_PA_VP EXYNOS4_PA_VP
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+
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+#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC
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+#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1
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+#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD
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+
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+/* Compatibility UART */
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+
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+#define EXYNOS4_PA_UART0 0x13800000
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+#define EXYNOS4_PA_UART1 0x13810000
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+#define EXYNOS4_PA_UART2 0x13820000
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+#define EXYNOS4_PA_UART3 0x13830000
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+#define EXYNOS4_SZ_UART SZ_256
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+
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+#define EXYNOS5_PA_UART0 0x12C00000
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+#define EXYNOS5_PA_UART1 0x12C10000
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+#define EXYNOS5_PA_UART2 0x12C20000
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+#define EXYNOS5_PA_UART3 0x12C30000
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+
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+#define EXYNOS5440_PA_UART0 0x000B0000
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+#define EXYNOS5440_PA_UART1 0x000C0000
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+#define EXYNOS5440_SZ_UART SZ_256
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+
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+#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
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+
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+#endif /* __ASM_ARCH_MAP_H */
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