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@@ -161,3 +161,17 @@
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#define OMAP3_CONTROL_PADCONF_CSI2_DX1_OFFSET 0x108
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#define OMAP3_CONTROL_PADCONF_CSI2_DX1_OFFSET 0x108
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#define OMAP3_CONTROL_PADCONF_CSI2_DY1_OFFSET 0x10a
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#define OMAP3_CONTROL_PADCONF_CSI2_DY1_OFFSET 0x10a
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#define OMAP3_CONTROL_PADCONF_MCBSP2_FSX_OFFSET 0x10c
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#define OMAP3_CONTROL_PADCONF_MCBSP2_FSX_OFFSET 0x10c
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+#define OMAP3_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET 0x10e
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+#define OMAP3_CONTROL_PADCONF_MCBSP2_DR_OFFSET 0x110
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+#define OMAP3_CONTROL_PADCONF_MCBSP2_DX_OFFSET 0x112
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_CLK_OFFSET 0x114
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_CMD_OFFSET 0x116
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT0_OFFSET 0x118
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT1_OFFSET 0x11a
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT2_OFFSET 0x11c
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT3_OFFSET 0x11e
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+
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+/* SDMMC1_DAT4 - DAT7 are SIM_IO SIM_CLK SIM_PWRCTRL and SIM_RST on 36xx */
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT4_OFFSET 0x120
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT5_OFFSET 0x122
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+#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT6_OFFSET 0x124
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