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@@ -800,3 +800,118 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
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GPIO48_nPOE,
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GPIO49_nPWE,
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+ GPIO50_nPIOR,
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+ GPIO51_nPIOW,
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+ GPIO85_nPCE_1,
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+ GPIO54_nPCE_2,
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+ GPIO79_PSKTSEL,
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+ GPIO55_nPREG,
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+ GPIO56_nPWAIT,
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+ GPIO57_nIOIS16,
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+ GPIO36_GPIO, /* CF CD */
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+ GPIO97_GPIO, /* CF PWREN */
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+ GPIO99_GPIO, /* CF RDY */
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+};
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+
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+/*
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+ * DM9k MSCx settings: SRAM, 16 bits
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+ * 17 cycles delay first access
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+ * 5 cycles delay next access
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+ * 13 cycles recovery time
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+ * faster device
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+ */
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+#define DM9K_MSC_VALUE 0xe4c9
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+
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+static void __init zeus_init(void)
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+{
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+ u16 dm9000_msc = DM9K_MSC_VALUE;
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+ u32 msc0, msc1;
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+
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+ system_rev = __raw_readw(ZEUS_CPLD_VERSION);
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+ pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
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+
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+ /* Fix timings for dm9000s (CS1/CS2)*/
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+ msc0 = (__raw_readl(MSC0) & 0x0000ffff) | (dm9000_msc << 16);
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+ msc1 = (__raw_readl(MSC1) & 0xffff0000) | dm9000_msc;
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+ __raw_writel(msc0, MSC0);
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+ __raw_writel(msc1, MSC1);
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+
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+ pm_power_off = zeus_power_off;
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+ zeus_setup_apm();
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+
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+ pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config));
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+
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+ platform_add_devices(zeus_devices, ARRAY_SIZE(zeus_devices));
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+
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+ pxa_set_ohci_info(&zeus_ohci_platform_data);
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+
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+ if (zeus_setup_fb_gpios())
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+ pr_err("Failed to setup fb gpios\n");
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+ else
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+ pxa_set_fb_info(NULL, &zeus_fb_info);
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+
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+ pxa_set_mci_info(&zeus_mci_platform_data);
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+ pxa_set_udc_info(&zeus_udc_info);
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+ pxa_set_ac97_info(&zeus_ac97_info);
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+ pxa_set_i2c_info(NULL);
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+ i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
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+ pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
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+ spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
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+}
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+
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+static struct map_desc zeus_io_desc[] __initdata = {
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+ {
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+ .virtual = (unsigned long)ZEUS_CPLD_VERSION,
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+ .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS),
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+ .length = 0x1000,
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+ .type = MT_DEVICE,
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+ },
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+ {
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+ .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ,
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+ .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS),
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+ .length = 0x1000,
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+ .type = MT_DEVICE,
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+ },
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+ {
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+ .virtual = (unsigned long)ZEUS_CPLD_CONTROL,
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+ .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS),
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+ .length = 0x1000,
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+ .type = MT_DEVICE,
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+ },
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+ {
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+ .virtual = (unsigned long)ZEUS_PC104IO,
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+ .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS),
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+ .length = 0x00800000,
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+ .type = MT_DEVICE,
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+ },
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+};
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+
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+static void __init zeus_map_io(void)
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+{
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+ pxa27x_map_io();
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+
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+ iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc));
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+
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+ /* Clear PSPR to ensure a full restart on wake-up. */
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+ PMCR = PSPR = 0;
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+
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+ /* enable internal 32.768Khz oscillator (ignore OSCC_OOK) */
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+ OSCC |= OSCC_OON;
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+
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+ /* Some clock cycles later (from OSCC_ON), programme PCFR (OPDE...).
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+ * float chip selects and PCMCIA */
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+ PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP;
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+}
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+
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+MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
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+ /* Maintainer: Marc Zyngier <maz@misterjones.org> */
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+ .atag_offset = 0x100,
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+ .map_io = zeus_map_io,
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+ .nr_irqs = ZEUS_NR_IRQS,
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+ .init_irq = zeus_init_irq,
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+ .handle_irq = pxa27x_handle_irq,
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+ .timer = &pxa_timer,
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+ .init_machine = zeus_init,
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+ .restart = pxa_restart,
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+MACHINE_END
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+
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吉超博