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@@ -356,3 +356,97 @@
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#define OMAP24XX_AUTO_DPLL_MASK (0x3 << 0)
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/* CM_CLKSEL1_PLL */
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+#define OMAP2430_MAXDPLLFASTLOCK_SHIFT 28
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+#define OMAP2430_MAXDPLLFASTLOCK_MASK (0x7 << 28)
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+#define OMAP24XX_APLLS_CLKIN_SHIFT 23
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+#define OMAP24XX_APLLS_CLKIN_MASK (0x7 << 23)
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+#define OMAP24XX_DPLL_MULT_SHIFT 12
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+#define OMAP24XX_DPLL_MULT_MASK (0x3ff << 12)
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+#define OMAP24XX_DPLL_DIV_SHIFT 8
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+#define OMAP24XX_DPLL_DIV_MASK (0xf << 8)
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+#define OMAP24XX_54M_SOURCE_SHIFT 5
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+#define OMAP24XX_54M_SOURCE_MASK (1 << 5)
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+#define OMAP24XX_54M_SOURCE_WIDTH 1
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+#define OMAP2430_96M_SOURCE_SHIFT 4
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+#define OMAP2430_96M_SOURCE_MASK (1 << 4)
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+#define OMAP2430_96M_SOURCE_WIDTH 1
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+#define OMAP24XX_48M_SOURCE_SHIFT 3
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+#define OMAP24XX_48M_SOURCE_MASK (1 << 3)
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+#define OMAP2430_ALTCLK_SOURCE_SHIFT 0
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+#define OMAP2430_ALTCLK_SOURCE_MASK (0x7 << 0)
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+
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+/* CM_CLKSEL2_PLL */
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+#define OMAP24XX_CORE_CLK_SRC_SHIFT 0
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+#define OMAP24XX_CORE_CLK_SRC_MASK (0x3 << 0)
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+
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+/* CM_FCLKEN_DSP */
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+#define OMAP2420_EN_IVA_COP_SHIFT 10
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+#define OMAP2420_EN_IVA_COP_MASK (1 << 10)
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+#define OMAP2420_EN_IVA_MPU_SHIFT 8
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+#define OMAP2420_EN_IVA_MPU_MASK (1 << 8)
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+#define OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT 0
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+#define OMAP24XX_CM_FCLKEN_DSP_EN_DSP_MASK (1 << 0)
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+
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+/* CM_ICLKEN_DSP */
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+#define OMAP2420_EN_DSP_IPI_SHIFT 1
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+#define OMAP2420_EN_DSP_IPI_MASK (1 << 1)
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+
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+/* CM_IDLEST_DSP */
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+#define OMAP2420_ST_IVA_MASK (1 << 8)
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+#define OMAP2420_ST_IPI_MASK (1 << 1)
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+#define OMAP24XX_ST_DSP_MASK (1 << 0)
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+
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+/* CM_AUTOIDLE_DSP */
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+#define OMAP2420_AUTO_DSP_IPI_MASK (1 << 1)
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+
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+/* CM_CLKSEL_DSP */
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+#define OMAP2420_SYNC_IVA_MASK (1 << 13)
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+#define OMAP2420_CLKSEL_IVA_SHIFT 8
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+#define OMAP2420_CLKSEL_IVA_MASK (0x1f << 8)
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+#define OMAP24XX_SYNC_DSP_MASK (1 << 7)
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+#define OMAP24XX_CLKSEL_DSP_IF_SHIFT 5
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+#define OMAP24XX_CLKSEL_DSP_IF_MASK (0x3 << 5)
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+#define OMAP24XX_CLKSEL_DSP_SHIFT 0
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+#define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0)
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+
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+/* CM_CLKSTCTRL_DSP */
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+#define OMAP2420_AUTOSTATE_IVA_SHIFT 8
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+#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8)
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+#define OMAP24XX_AUTOSTATE_DSP_SHIFT 0
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+#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0)
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+
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+/* CM_FCLKEN_MDM */
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+/* 2430 only */
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+#define OMAP2430_EN_OSC_SHIFT 1
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+#define OMAP2430_EN_OSC_MASK (1 << 1)
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+
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+/* CM_ICLKEN_MDM */
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+/* 2430 only */
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+#define OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT 0
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+#define OMAP2430_CM_ICLKEN_MDM_EN_MDM_MASK (1 << 0)
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+
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+/* CM_IDLEST_MDM specific bits */
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+/* 2430 only */
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+
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+/* CM_AUTOIDLE_MDM */
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+/* 2430 only */
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+#define OMAP2430_AUTO_OSC_MASK (1 << 1)
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+#define OMAP2430_AUTO_MDM_MASK (1 << 0)
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+
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+/* CM_CLKSEL_MDM */
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+/* 2430 only */
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+#define OMAP2430_SYNC_MDM_MASK (1 << 4)
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+#define OMAP2430_CLKSEL_MDM_SHIFT 0
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+#define OMAP2430_CLKSEL_MDM_MASK (0xf << 0)
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+
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+/* CM_CLKSTCTRL_MDM */
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+/* 2430 only */
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+#define OMAP2430_AUTOSTATE_MDM_SHIFT 0
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+#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0)
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+
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+/* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */
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+#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0
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+#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1
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+
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+
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+#endif
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