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@@ -1714,3 +1714,88 @@
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#define OMAP4430_WKUPDEP_GPIO1_IRQ2_TESLA_MASK (1 << 6)
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/* Used by PM_L4PER_GPIO2_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO2_IRQ1_DUCATI_SHIFT 1
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+#define OMAP4430_WKUPDEP_GPIO2_IRQ1_DUCATI_MASK (1 << 1)
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+
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+/* Used by PM_L4PER_GPIO2_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO2_IRQ1_MPU_SHIFT 0
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+#define OMAP4430_WKUPDEP_GPIO2_IRQ1_MPU_MASK (1 << 0)
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+
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+/* Used by PM_L4PER_GPIO2_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO2_IRQ2_TESLA_SHIFT 6
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+#define OMAP4430_WKUPDEP_GPIO2_IRQ2_TESLA_MASK (1 << 6)
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+
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+/* Used by PM_L4PER_GPIO3_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO3_IRQ1_MPU_SHIFT 0
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+#define OMAP4430_WKUPDEP_GPIO3_IRQ1_MPU_MASK (1 << 0)
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+
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+/* Used by PM_L4PER_GPIO3_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO3_IRQ2_TESLA_SHIFT 6
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+#define OMAP4430_WKUPDEP_GPIO3_IRQ2_TESLA_MASK (1 << 6)
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+
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+/* Used by PM_L4PER_GPIO4_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO4_IRQ1_MPU_SHIFT 0
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+#define OMAP4430_WKUPDEP_GPIO4_IRQ1_MPU_MASK (1 << 0)
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+
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+/* Used by PM_L4PER_GPIO4_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO4_IRQ2_TESLA_SHIFT 6
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+#define OMAP4430_WKUPDEP_GPIO4_IRQ2_TESLA_MASK (1 << 6)
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+
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+/* Used by PM_L4PER_GPIO5_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO5_IRQ1_MPU_SHIFT 0
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+#define OMAP4430_WKUPDEP_GPIO5_IRQ1_MPU_MASK (1 << 0)
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+
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+/* Used by PM_L4PER_GPIO5_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO5_IRQ2_TESLA_SHIFT 6
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+#define OMAP4430_WKUPDEP_GPIO5_IRQ2_TESLA_MASK (1 << 6)
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+
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+/* Used by PM_L4PER_GPIO6_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO6_IRQ1_MPU_SHIFT 0
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+#define OMAP4430_WKUPDEP_GPIO6_IRQ1_MPU_MASK (1 << 0)
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+
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+/* Used by PM_L4PER_GPIO6_WKDEP */
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+#define OMAP4430_WKUPDEP_GPIO6_IRQ2_TESLA_SHIFT 6
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+#define OMAP4430_WKUPDEP_GPIO6_IRQ2_TESLA_MASK (1 << 6)
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+
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+/* Used by PM_DSS_DSS_WKDEP */
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+#define OMAP4430_WKUPDEP_HDMIDMA_SDMA_SHIFT 19
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+#define OMAP4430_WKUPDEP_HDMIDMA_SDMA_MASK (1 << 19)
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+
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+/* Used by PM_DSS_DSS_WKDEP */
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+#define OMAP4430_WKUPDEP_HDMIIRQ_DUCATI_SHIFT 13
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+#define OMAP4430_WKUPDEP_HDMIIRQ_DUCATI_MASK (1 << 13)
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+
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+/* Used by PM_DSS_DSS_WKDEP */
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+#define OMAP4430_WKUPDEP_HDMIIRQ_MPU_SHIFT 12
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+#define OMAP4430_WKUPDEP_HDMIIRQ_MPU_MASK (1 << 12)
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+
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+/* Used by PM_DSS_DSS_WKDEP */
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+#define OMAP4430_WKUPDEP_HDMIIRQ_TESLA_SHIFT 14
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+#define OMAP4430_WKUPDEP_HDMIIRQ_TESLA_MASK (1 << 14)
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+
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+/* Used by PM_L4PER_HECC1_WKDEP */
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+#define OMAP4430_WKUPDEP_HECC1_MPU_SHIFT 0
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+#define OMAP4430_WKUPDEP_HECC1_MPU_MASK (1 << 0)
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+
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+/* Used by PM_L4PER_HECC2_WKDEP */
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+#define OMAP4430_WKUPDEP_HECC2_MPU_SHIFT 0
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+#define OMAP4430_WKUPDEP_HECC2_MPU_MASK (1 << 0)
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+
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+/* Used by PM_L3INIT_HSI_WKDEP */
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+#define OMAP4430_WKUPDEP_HSI_DSP_TESLA_SHIFT 6
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+#define OMAP4430_WKUPDEP_HSI_DSP_TESLA_MASK (1 << 6)
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+
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+/* Used by PM_L3INIT_HSI_WKDEP */
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+#define OMAP4430_WKUPDEP_HSI_MCU_DUCATI_SHIFT 1
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+#define OMAP4430_WKUPDEP_HSI_MCU_DUCATI_MASK (1 << 1)
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+
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+/* Used by PM_L3INIT_HSI_WKDEP */
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+#define OMAP4430_WKUPDEP_HSI_MCU_MPU_SHIFT 0
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+#define OMAP4430_WKUPDEP_HSI_MCU_MPU_MASK (1 << 0)
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+
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+/* Used by PM_L4PER_I2C1_WKDEP */
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+#define OMAP4430_WKUPDEP_I2C1_DMA_SDMA_SHIFT 7
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+#define OMAP4430_WKUPDEP_I2C1_DMA_SDMA_MASK (1 << 7)
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+
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+/* Used by PM_L4PER_I2C1_WKDEP */
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+#define OMAP4430_WKUPDEP_I2C1_IRQ_DUCATI_SHIFT 1
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