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+#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_24XX_H
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+#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_24XX_H
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+
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+/*
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+ * OMAP24XX Clock Management register bits
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+ *
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+ * Copyright (C) 2007 Texas Instruments, Inc.
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+ * Copyright (C) 2007 Nokia Corporation
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+ *
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+ * Written by Paul Walmsley
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+/* Bits shared between registers */
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+
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+/* CM_FCLKEN1_CORE and CM_ICLKEN1_CORE shared bits */
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+#define OMAP24XX_EN_CAM_SHIFT 31
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+#define OMAP24XX_EN_CAM_MASK (1 << 31)
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+#define OMAP24XX_EN_WDT4_SHIFT 29
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+#define OMAP24XX_EN_WDT4_MASK (1 << 29)
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+#define OMAP2420_EN_WDT3_SHIFT 28
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+#define OMAP2420_EN_WDT3_MASK (1 << 28)
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+#define OMAP24XX_EN_MSPRO_SHIFT 27
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+#define OMAP24XX_EN_MSPRO_MASK (1 << 27)
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+#define OMAP24XX_EN_FAC_SHIFT 25
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+#define OMAP24XX_EN_FAC_MASK (1 << 25)
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+#define OMAP2420_EN_EAC_SHIFT 24
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+#define OMAP2420_EN_EAC_MASK (1 << 24)
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+#define OMAP24XX_EN_HDQ_SHIFT 23
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+#define OMAP24XX_EN_HDQ_MASK (1 << 23)
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+#define OMAP2420_EN_I2C2_SHIFT 20
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+#define OMAP2420_EN_I2C2_MASK (1 << 20)
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+#define OMAP2420_EN_I2C1_SHIFT 19
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+#define OMAP2420_EN_I2C1_MASK (1 << 19)
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+
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+/* CM_FCLKEN2_CORE and CM_ICLKEN2_CORE shared bits */
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+#define OMAP2430_EN_MCBSP5_SHIFT 5
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+#define OMAP2430_EN_MCBSP5_MASK (1 << 5)
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+#define OMAP2430_EN_MCBSP4_SHIFT 4
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+#define OMAP2430_EN_MCBSP4_MASK (1 << 4)
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+#define OMAP2430_EN_MCBSP3_SHIFT 3
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+#define OMAP2430_EN_MCBSP3_MASK (1 << 3)
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+#define OMAP24XX_EN_SSI_SHIFT 1
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+#define OMAP24XX_EN_SSI_MASK (1 << 1)
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+
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+/* CM_FCLKEN_WKUP and CM_ICLKEN_WKUP shared bits */
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+#define OMAP24XX_EN_MPU_WDT_SHIFT 3
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+#define OMAP24XX_EN_MPU_WDT_MASK (1 << 3)
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+
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+/* Bits specific to each register */
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+
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+/* CM_IDLEST_MPU */
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+/* 2430 only */
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+#define OMAP2430_ST_MPU_MASK (1 << 0)
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+
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+/* CM_CLKSEL_MPU */
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+#define OMAP24XX_CLKSEL_MPU_SHIFT 0
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+#define OMAP24XX_CLKSEL_MPU_MASK (0x1f << 0)
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+#define OMAP24XX_CLKSEL_MPU_WIDTH 5
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