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@@ -90,3 +90,70 @@ typedef struct {
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titan_64 serren;
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titan_64 serrset;
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titan_64 reserved0;
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+ titan_64 gperror;
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+ titan_64 gperren;
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+ titan_64 gperrset;
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+ titan_64 reserved1;
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+ titan_64 gtlbiv;
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+ titan_64 gtlbia;
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+ titan_64 reserved2[2];
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+ titan_64 sctl;
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+ titan_64 reserved3[3];
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+ } g;
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+ struct {
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+ titan_64 agperror;
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+ titan_64 agperren;
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+ titan_64 agperrset;
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+ titan_64 agplastwr;
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+ titan_64 aperror;
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+ titan_64 aperren;
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+ titan_64 aperrset;
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+ titan_64 reserved0;
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+ titan_64 atlbiv;
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+ titan_64 atlbia;
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+ titan_64 reserved1[6];
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+ } a;
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+ } port_specific;
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+ titan_64 sprst;
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+ titan_64 reserved1[31];
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+} titan_pachip_port;
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+
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+typedef struct {
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+ titan_pachip_port g_port;
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+ titan_pachip_port a_port;
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+} titan_pachip;
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+
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+#define TITAN_cchip ((titan_cchip *)(IDENT_ADDR+TI_BIAS+0x1A0000000UL))
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+#define TITAN_dchip ((titan_dchip *)(IDENT_ADDR+TI_BIAS+0x1B0000800UL))
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+#define TITAN_pachip0 ((titan_pachip *)(IDENT_ADDR+TI_BIAS+0x180000000UL))
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+#define TITAN_pachip1 ((titan_pachip *)(IDENT_ADDR+TI_BIAS+0x380000000UL))
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+extern unsigned TITAN_agp;
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+extern int TITAN_bootcpu;
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+
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+/*
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+ * TITAN PA-chip Window Space Base Address register.
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+ * (WSBA[0-2])
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+ */
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+#define wsba_m_ena 0x1
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+#define wsba_m_sg 0x2
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+#define wsba_m_addr 0xFFF00000
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+#define wmask_k_sz1gb 0x3FF00000
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+union TPAchipWSBA {
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+ struct {
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+ unsigned wsba_v_ena : 1;
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+ unsigned wsba_v_sg : 1;
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+ unsigned wsba_v_rsvd1 : 18;
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+ unsigned wsba_v_addr : 12;
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+ unsigned wsba_v_rsvd2 : 32;
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+ } wsba_r_bits;
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+ int wsba_q_whole [2];
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+};
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+
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+/*
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+ * TITAN PA-chip Control Register
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+ * This definition covers both the G-Port GPCTL and the A-PORT APCTL.
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+ * Bits <51:0> are the same in both cases. APCTL<63:52> are only
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+ * applicable to AGP.
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+ */
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+#define pctl_m_fbtb 0x00000001
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+#define pctl_m_thdis 0x00000002
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