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+/*
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+ * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
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+ *
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+ * Copyright (C) 2009-2011 Nokia Corporation
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+ * Copyright (C) 2012 Texas Instruments, Inc.
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+ * Paul Walmsley
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * XXX handle crossbar/shared link difference for L3?
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+ * XXX these should be marked initdata for multi-OMAP kernels
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+ */
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+
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+#include <linux/i2c-omap.h>
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+#include <linux/platform_data/asoc-ti-mcbsp.h>
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+#include <linux/platform_data/spi-omap2-mcspi.h>
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+#include <linux/omap-dma.h>
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+#include <plat/dmtimer.h>
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+
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+#include "omap_hwmod.h"
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+#include "mmc.h"
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+#include "l3_2xxx.h"
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+
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+#include "soc.h"
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+#include "omap_hwmod_common_data.h"
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+#include "prm-regbits-24xx.h"
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+#include "cm-regbits-24xx.h"
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+#include "i2c.h"
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+#include "wd_timer.h"
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+
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+/*
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+ * OMAP2430 hardware module integration data
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+ *
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+ * All of the data in this section should be autogeneratable from the
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+ * TI hardware database or other technical documentation. Data that
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+ * is driver-specific or driver-kernel integration-specific belongs
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+ * elsewhere.
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+ */
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+
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+/*
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+ * IP blocks
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+ */
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+
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+/* IVA2 (IVA2) */
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+static struct omap_hwmod_rst_info omap2430_iva_resets[] = {
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+ { .name = "logic", .rst_shift = 0 },
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+ { .name = "mmu", .rst_shift = 1 },
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+};
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+
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+static struct omap_hwmod omap2430_iva_hwmod = {
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+ .name = "iva",
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+ .class = &iva_hwmod_class,
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+ .clkdm_name = "dsp_clkdm",
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+ .rst_lines = omap2430_iva_resets,
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+ .rst_lines_cnt = ARRAY_SIZE(omap2430_iva_resets),
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+ .main_clk = "dsp_fck",
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+};
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+
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+/* I2C common */
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+static struct omap_hwmod_class_sysconfig i2c_sysc = {
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+ .rev_offs = 0x00,
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+ .sysc_offs = 0x20,
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+ .syss_offs = 0x10,
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+ .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
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+ SYSS_HAS_RESET_STATUS),
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+ .sysc_fields = &omap_hwmod_sysc_type1,
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+};
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+
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+static struct omap_hwmod_class i2c_class = {
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+ .name = "i2c",
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+ .sysc = &i2c_sysc,
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+ .rev = OMAP_I2C_IP_VERSION_1,
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+ .reset = &omap_i2c_reset,
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+};
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+
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+static struct omap_i2c_dev_attr i2c_dev_attr = {
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+ .fifo_depth = 8, /* bytes */
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+ .flags = OMAP_I2C_FLAG_BUS_SHIFT_2 |
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+ OMAP_I2C_FLAG_FORCE_19200_INT_CLK,
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+};
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+
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+/* I2C1 */
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+static struct omap_hwmod omap2430_i2c1_hwmod = {
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+ .name = "i2c1",
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+ .flags = HWMOD_16BIT_REG,
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+ .mpu_irqs = omap2_i2c1_mpu_irqs,
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+ .sdma_reqs = omap2_i2c1_sdma_reqs,
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+ .main_clk = "i2chs1_fck",
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+ .prcm = {
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+ .omap2 = {
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+ /*
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+ * NOTE: The CM_FCLKEN* and CM_ICLKEN* for
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+ * I2CHS IP's do not follow the usual pattern.
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+ * prcm_reg_id alone cannot be used to program
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+ * the iclk and fclk. Needs to be handled using
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+ * additional flags when clk handling is moved
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+ * to hwmod framework.
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+ */
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+ .module_offs = CORE_MOD,
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP2430_EN_I2CHS1_SHIFT,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT,
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+ },
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+ },
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+ .class = &i2c_class,
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+ .dev_attr = &i2c_dev_attr,
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+};
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+
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+/* I2C2 */
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+static struct omap_hwmod omap2430_i2c2_hwmod = {
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+ .name = "i2c2",
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+ .flags = HWMOD_16BIT_REG,
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+ .mpu_irqs = omap2_i2c2_mpu_irqs,
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+ .sdma_reqs = omap2_i2c2_sdma_reqs,
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+ .main_clk = "i2chs2_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .module_offs = CORE_MOD,
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP2430_EN_I2CHS2_SHIFT,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT,
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+ },
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+ },
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+ .class = &i2c_class,
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+ .dev_attr = &i2c_dev_attr,
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+};
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+
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+/* gpio5 */
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+static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
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+ { .irq = 33 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK5 */
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+ { .irq = -1 },
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+};
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+
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+static struct omap_hwmod omap2430_gpio5_hwmod = {
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+ .name = "gpio5",
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+ .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
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+ .mpu_irqs = omap243x_gpio5_irqs,
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+ .main_clk = "gpio5_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 2,
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+ .module_bit = OMAP2430_EN_GPIO5_SHIFT,
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+ .module_offs = CORE_MOD,
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+ .idlest_reg_id = 2,
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+ .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,
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+ },
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+ },
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+ .class = &omap2xxx_gpio_hwmod_class,
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+ .dev_attr = &omap2xxx_gpio_dev_attr,
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+};
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+
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+/* dma attributes */
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+static struct omap_dma_dev_attr dma_dev_attr = {
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+ .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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李海忠