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@@ -123,3 +123,74 @@ struct iop13xx_adma_desc_dual_xor {
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u32 d_upper_dest_addr;
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};
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+struct iop13xx_adma_desc_pq_update {
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+ u32 next_desc;
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+ u32 desc_ctrl;
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+ u32 reserved;
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+ u32 byte_count;
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+ u32 p_dest_addr;
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+ u32 p_upper_dest_addr;
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+ u32 src0_addr;
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+ u32 upper_src0_addr;
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+ u32 src1_addr;
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+ u32 upper_src1_addr;
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+ u32 p_src_addr;
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+ u32 p_upper_src_addr;
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+ u32 q_src_addr;
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+ struct {
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+ unsigned int q_upper_src_addr:24;
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+ unsigned int q_dmlt:8;
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+ };
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+ u32 q_dest_addr;
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+ u32 q_upper_dest_addr;
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+};
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+
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+static inline int iop_adma_get_max_xor(void)
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+{
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+ return 16;
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+}
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+
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+#define iop_adma_get_max_pq iop_adma_get_max_xor
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+
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+static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan)
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+{
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+ return __raw_readl(ADMA_ADAR(chan));
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+}
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+
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+static inline void iop_chan_set_next_descriptor(struct iop_adma_chan *chan,
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+ u32 next_desc_addr)
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+{
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+ __raw_writel(next_desc_addr, ADMA_ANDAR(chan));
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+}
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+
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+#define ADMA_STATUS_BUSY (1 << 13)
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+
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+static inline char iop_chan_is_busy(struct iop_adma_chan *chan)
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+{
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+ if (__raw_readl(ADMA_ACSR(chan)) &
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+ ADMA_STATUS_BUSY)
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+ return 1;
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+ else
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+ return 0;
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+}
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+
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+static inline int
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+iop_chan_get_desc_align(struct iop_adma_chan *chan, int num_slots)
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+{
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+ return 1;
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+}
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+#define iop_desc_is_aligned(x, y) 1
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+
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+static inline int
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+iop_chan_memcpy_slot_count(size_t len, int *slots_per_op)
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+{
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+ *slots_per_op = 1;
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+ return 1;
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+}
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+
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+#define iop_chan_interrupt_slot_count(s, c) iop_chan_memcpy_slot_count(0, s)
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+
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+static inline int
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+iop_chan_memset_slot_count(size_t len, int *slots_per_op)
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+{
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+ *slots_per_op = 1;
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