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@@ -0,0 +1,55 @@
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+/*
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+ * include/asm-alpha/dma.h
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+ *
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+ * This is essentially the same as the i386 DMA stuff, as the AlphaPCs
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+ * use ISA-compatible dma. The only extension is support for high-page
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+ * registers that allow to set the top 8 bits of a 32-bit DMA address.
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+ * This register should be written last when setting up a DMA address
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+ * as this will also enable DMA across 64 KB boundaries.
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+ */
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+
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+/* $Id: dma.h,v 1.7 1992/12/14 00:29:34 root Exp root $
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+ * linux/include/asm/dma.h: Defines for using and allocating dma channels.
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+ * Written by Hennus Bergman, 1992.
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+ * High DMA channel support & info by Hannu Savolainen
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+ * and John Boyd, Nov. 1992.
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+ */
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+
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+#ifndef _ASM_DMA_H
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+#define _ASM_DMA_H
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+
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+#include <linux/spinlock.h>
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+#include <asm/io.h>
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+
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+#define dma_outb outb
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+#define dma_inb inb
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+
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+/*
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+ * NOTES about DMA transfers:
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+ *
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+ * controller 1: channels 0-3, byte operations, ports 00-1F
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+ * controller 2: channels 4-7, word operations, ports C0-DF
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+ *
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+ * - ALL registers are 8 bits only, regardless of transfer size
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+ * - channel 4 is not used - cascades 1 into 2.
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+ * - channels 0-3 are byte - addresses/counts are for physical bytes
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+ * - channels 5-7 are word - addresses/counts are for physical words
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+ * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
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+ * - transfer count loaded to registers is 1 less than actual count
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+ * - controller 2 offsets are all even (2x offsets for controller 1)
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+ * - page registers for 5-7 don't use data bit 0, represent 128K pages
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+ * - page registers for 0-3 use bit 0, represent 64K pages
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+ *
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+ * DMA transfers are limited to the lower 16MB of _physical_ memory.
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+ * Note that addresses loaded into registers must be _physical_ addresses,
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+ * not logical addresses (which may differ if paging is active).
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+ *
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+ * Address mapping for channels 0-3:
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+ *
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+ * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
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+ * | ... | | ... | | ... |
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+ * | ... | | ... | | ... |
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+ * | ... | | ... | | ... |
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+ * P7 ... P0 A7 ... A0 A7 ... A0
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+ * | Page | Addr MSB | Addr LSB | (DMA registers)
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+ *
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