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@@ -251,3 +251,54 @@ static int s3c64xx_dma_stop(struct s3c2410_dma_chan *chan)
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config = readl(chan->regs + PL080S_CH_CONFIG);
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config &= ~PL080_CONFIG_ENABLE;
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writel(config, chan->regs + PL080S_CH_CONFIG);
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+
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+ return 0;
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+}
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+
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+static inline void s3c64xx_dma_bufffdone(struct s3c2410_dma_chan *chan,
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+ struct s3c64xx_dma_buff *buf,
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+ enum s3c2410_dma_buffresult result)
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+{
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+ if (chan->callback_fn != NULL)
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+ (chan->callback_fn)(chan, buf->pw, 0, result);
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+}
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+
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+static void s3c64xx_dma_freebuff(struct s3c64xx_dma_buff *buff)
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+{
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+ dma_pool_free(dma_pool, buff->lli, buff->lli_dma);
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+ kfree(buff);
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+}
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+
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+static int s3c64xx_dma_flush(struct s3c2410_dma_chan *chan)
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+{
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+ struct s3c64xx_dma_buff *buff, *next;
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+ u32 config;
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+
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+ dbg_showchan(chan);
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+
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+ pr_debug("%s: flushing channel\n", __func__);
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+
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+ config = readl(chan->regs + PL080S_CH_CONFIG);
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+ config &= ~PL080_CONFIG_ENABLE;
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+ writel(config, chan->regs + PL080S_CH_CONFIG);
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+
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+ /* dump all the buffers associated with this channel */
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+
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+ for (buff = chan->curr; buff != NULL; buff = next) {
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+ next = buff->next;
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+ pr_debug("%s: buff %p (next %p)\n", __func__, buff, buff->next);
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+
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+ s3c64xx_dma_bufffdone(chan, buff, S3C2410_RES_ABORT);
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+ s3c64xx_dma_freebuff(buff);
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+ }
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+
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+ chan->curr = chan->next = chan->end = NULL;
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+
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+ return 0;
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+}
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+
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+int s3c2410_dma_ctrl(enum dma_ch channel, enum s3c2410_chan_op op)
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+{
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+ struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
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+
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+ WARN_ON(!chan);
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