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@@ -1622,3 +1622,64 @@ static struct atmel_uart_data uart0_data = {
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.use_dma_tx = 1,
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.use_dma_rx = 1,
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};
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+
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+static u64 uart0_dmamask = DMA_BIT_MASK(32);
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+
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+static struct platform_device at91sam9g45_uart0_device = {
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+ .name = "atmel_usart",
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+ .id = 1,
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+ .dev = {
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+ .dma_mask = &uart0_dmamask,
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+ .coherent_dma_mask = DMA_BIT_MASK(32),
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+ .platform_data = &uart0_data,
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+ },
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+ .resource = uart0_resources,
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+ .num_resources = ARRAY_SIZE(uart0_resources),
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+};
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+
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+static inline void configure_usart0_pins(unsigned pins)
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+{
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+ at91_set_A_periph(AT91_PIN_PB19, 1); /* TXD0 */
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+ at91_set_A_periph(AT91_PIN_PB18, 0); /* RXD0 */
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+
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+ if (pins & ATMEL_UART_RTS)
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+ at91_set_B_periph(AT91_PIN_PB17, 0); /* RTS0 */
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+ if (pins & ATMEL_UART_CTS)
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+ at91_set_B_periph(AT91_PIN_PB15, 0); /* CTS0 */
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+}
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+
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+static struct resource uart1_resources[] = {
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+ [0] = {
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+ .start = AT91SAM9G45_BASE_US1,
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+ .end = AT91SAM9G45_BASE_US1 + SZ_16K - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
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+ .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct atmel_uart_data uart1_data = {
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+ .use_dma_tx = 1,
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+ .use_dma_rx = 1,
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+};
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+
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+static u64 uart1_dmamask = DMA_BIT_MASK(32);
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+
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+static struct platform_device at91sam9g45_uart1_device = {
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+ .name = "atmel_usart",
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+ .id = 2,
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+ .dev = {
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+ .dma_mask = &uart1_dmamask,
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+ .coherent_dma_mask = DMA_BIT_MASK(32),
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+ .platform_data = &uart1_data,
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+ },
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+ .resource = uart1_resources,
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+ .num_resources = ARRAY_SIZE(uart1_resources),
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+};
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+
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+static inline void configure_usart1_pins(unsigned pins)
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+{
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+ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD1 */
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