efHotAgingTrendMining memoryCall.h 李欣儒 commit at 2021-03-19

efHotAgingTrendMining/dataSharedMemory/memoryCall.h

@@ -1445,3 +1445,149 @@
 #define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_11_11_MASK		(1 << 11)
 
 /* Used by CM_DSS_DSS_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_SYS_CLK_SHIFT			10
+#define OMAP4430_OPTFCLKEN_SYS_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_SYS_CLK_MASK				(1 << 10)
+
+/* Used by CM_WKUP_BANDGAP_CLKCTRL */
+#define OMAP4460_OPTFCLKEN_TS_FCLK_SHIFT			8
+#define OMAP4460_OPTFCLKEN_TS_FCLK_WIDTH			0x1
+#define OMAP4460_OPTFCLKEN_TS_FCLK_MASK				(1 << 8)
+
+/* Used by CM_DSS_DSS_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_TV_CLK_SHIFT				11
+#define OMAP4430_OPTFCLKEN_TV_CLK_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_TV_CLK_MASK				(1 << 11)
+
+/* Used by CM_L3INIT_UNIPRO1_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_TXPHYCLK_SHIFT			8
+#define OMAP4430_OPTFCLKEN_TXPHYCLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_TXPHYCLK_MASK			(1 << 8)
+
+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT			8
+#define OMAP4430_OPTFCLKEN_USB_CH0_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_USB_CH0_CLK_MASK			(1 << 8)
+
+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT			9
+#define OMAP4430_OPTFCLKEN_USB_CH1_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_USB_CH1_CLK_MASK			(1 << 9)
+
+/* Used by CM_L3INIT_USB_TLL_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT			10
+#define OMAP4430_OPTFCLKEN_USB_CH2_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_USB_CH2_CLK_MASK			(1 << 10)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT			8
+#define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_MASK			(1 << 8)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT			9
+#define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_MASK			(1 << 9)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT			10
+#define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_MASK			(1 << 10)
+
+/* Used by CM_L3INIT_USB_OTG_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_XCLK_SHIFT				8
+#define OMAP4430_OPTFCLKEN_XCLK_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_XCLK_MASK				(1 << 8)
+
+/* Used by CM_EMU_OVERRIDE_DPLL_CORE */
+#define OMAP4430_OVERRIDE_ENABLE_SHIFT				19
+#define OMAP4430_OVERRIDE_ENABLE_WIDTH				0x1
+#define OMAP4430_OVERRIDE_ENABLE_MASK				(1 << 19)
+
+/* Used by CM_CLKSEL_ABE */
+#define OMAP4430_PAD_CLKS_GATE_SHIFT				8
+#define OMAP4430_PAD_CLKS_GATE_WIDTH				0x1
+#define OMAP4430_PAD_CLKS_GATE_MASK				(1 << 8)
+
+/* Used by CM_CORE_DVFS_CURRENT, CM_IVA_DVFS_CURRENT */
+#define OMAP4430_PERF_CURRENT_SHIFT				0
+#define OMAP4430_PERF_CURRENT_WIDTH				0x8
+#define OMAP4430_PERF_CURRENT_MASK				(0xff << 0)
+
+/*
+ * Used by CM_CORE_DVFS_PERF1, CM_CORE_DVFS_PERF2, CM_CORE_DVFS_PERF3,
+ * CM_CORE_DVFS_PERF4, CM_IVA_DVFS_PERF_ABE, CM_IVA_DVFS_PERF_IVAHD,
+ * CM_IVA_DVFS_PERF_TESLA
+ */
+#define OMAP4430_PERF_REQ_SHIFT					0
+#define OMAP4430_PERF_REQ_WIDTH					0x8
+#define OMAP4430_PERF_REQ_MASK					(0xff << 0)
+
+/* Used by CM_RESTORE_ST */
+#define OMAP4430_PHASE1_COMPLETED_SHIFT				0
+#define OMAP4430_PHASE1_COMPLETED_WIDTH				0x1
+#define OMAP4430_PHASE1_COMPLETED_MASK				(1 << 0)
+
+/* Used by CM_RESTORE_ST */
+#define OMAP4430_PHASE2A_COMPLETED_SHIFT			1
+#define OMAP4430_PHASE2A_COMPLETED_WIDTH			0x1
+#define OMAP4430_PHASE2A_COMPLETED_MASK				(1 << 1)
+
+/* Used by CM_RESTORE_ST */
+#define OMAP4430_PHASE2B_COMPLETED_SHIFT			2
+#define OMAP4430_PHASE2B_COMPLETED_WIDTH			0x1
+#define OMAP4430_PHASE2B_COMPLETED_MASK				(1 << 2)
+
+/* Used by CM_EMU_DEBUGSS_CLKCTRL */
+#define OMAP4430_PMD_STM_MUX_CTRL_SHIFT				20
+#define OMAP4430_PMD_STM_MUX_CTRL_WIDTH				0x2
+#define OMAP4430_PMD_STM_MUX_CTRL_MASK				(0x3 << 20)
+
+/* Used by CM_EMU_DEBUGSS_CLKCTRL */
+#define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT			22
+#define OMAP4430_PMD_TRACE_MUX_CTRL_WIDTH			0x2
+#define OMAP4430_PMD_TRACE_MUX_CTRL_MASK			(0x3 << 22)
+
+/* Used by CM_DYN_DEP_PRESCAL */
+#define OMAP4430_PRESCAL_SHIFT					0
+#define OMAP4430_PRESCAL_WIDTH					0x6
+#define OMAP4430_PRESCAL_MASK					(0x3f << 0)
+
+/* Used by REVISION_CM1, REVISION_CM2 */
+#define OMAP4430_R_RTL_SHIFT					11
+#define OMAP4430_R_RTL_WIDTH					0x5
+#define OMAP4430_R_RTL_MASK					(0x1f << 11)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL */
+#define OMAP4430_SAR_MODE_SHIFT					4
+#define OMAP4430_SAR_MODE_WIDTH					0x1
+#define OMAP4430_SAR_MODE_MASK					(1 << 4)
+
+/* Used by CM_SCALE_FCLK */
+#define OMAP4430_SCALE_FCLK_SHIFT				0
+#define OMAP4430_SCALE_FCLK_WIDTH				0x1
+#define OMAP4430_SCALE_FCLK_MASK				(1 << 0)
+
+/* Used by REVISION_CM1, REVISION_CM2 */
+#define OMAP4430_SCHEME_SHIFT					30
+#define OMAP4430_SCHEME_WIDTH					0x2
+#define OMAP4430_SCHEME_MASK					(0x3 << 30)
+
+/* Used by CM_L4CFG_DYNAMICDEP */
+#define OMAP4430_SDMA_DYNDEP_SHIFT				11
+#define OMAP4430_SDMA_DYNDEP_WIDTH				0x1
+#define OMAP4430_SDMA_DYNDEP_MASK				(1 << 11)
+
+/* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP */
+#define OMAP4430_SDMA_STATDEP_SHIFT				11
+#define OMAP4430_SDMA_STATDEP_WIDTH				0x1
+#define OMAP4430_SDMA_STATDEP_MASK				(1 << 11)
+
+/* Used by CM_CLKSEL_ABE */
+#define OMAP4430_SLIMBUS_CLK_GATE_SHIFT				10
+#define OMAP4430_SLIMBUS_CLK_GATE_WIDTH				0x1
+#define OMAP4430_SLIMBUS_CLK_GATE_MASK				(1 << 10)
+
+/*
+ * Used by CM1_ABE_AESS_CLKCTRL, CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL,
+ * CM_D2D_SAD2D_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL,