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				@@ -423,3 +423,172 @@ static void enable_board_wakeup_source(void) 
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				 	omap_mux_init_signal("sys_nirq", 
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				 		OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); 
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				 } 
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				+ 
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				+static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 
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				+ 
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				+	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 
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				+	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 
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				+	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 
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				+ 
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				+	.phy_reset  = true, 
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				+	.reset_gpio_port[0]  = 57, 
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				+	.reset_gpio_port[1]  = 61, 
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				+	.reset_gpio_port[2]  = -EINVAL 
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				+}; 
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				+ 
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				+#ifdef CONFIG_OMAP_MUX 
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				+static struct omap_board_mux board_mux[] __initdata = { 
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				+	{ .reg_offset = OMAP_MUX_TERMINATOR }, 
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				+}; 
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				+#else 
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				+#define board_mux	NULL 
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				+#endif 
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				+ 
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				+/* 
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				+ * SDP3430 V2 Board CS organization 
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				+ * Different from SDP3430 V1. Now 4 switches used to specify CS 
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				+ * 
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				+ * See also the Switch S8 settings in the comments. 
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				+ */ 
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				+static char chip_sel_3430[][GPMC_CS_NUM] = { 
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				+	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ 
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				+	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ 
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				+	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ 
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				+}; 
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				+ 
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				+static struct mtd_partition sdp_nor_partitions[] = { 
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				+	/* bootloader (U-Boot, etc) in first sector */ 
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				+	{ 
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				+		.name		= "Bootloader-NOR", 
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				+		.offset		= 0, 
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				+		.size		= SZ_256K, 
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				+		.mask_flags	= MTD_WRITEABLE, /* force read-only */ 
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				+	}, 
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				+	/* bootloader params in the next sector */ 
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				+	{ 
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				+		.name		= "Params-NOR", 
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				+		.offset		= MTDPART_OFS_APPEND, 
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				+		.size		= SZ_256K, 
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				+		.mask_flags	= 0, 
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				+	}, 
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				+	/* kernel */ 
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				+	{ 
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				+		.name		= "Kernel-NOR", 
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				+		.offset		= MTDPART_OFS_APPEND, 
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				+		.size		= SZ_2M, 
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				+		.mask_flags	= 0 
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				+	}, 
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				+	/* file system */ 
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				+	{ 
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				+		.name		= "Filesystem-NOR", 
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				+		.offset		= MTDPART_OFS_APPEND, 
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				+		.size		= MTDPART_SIZ_FULL, 
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				+		.mask_flags	= 0 
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				+	} 
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				+}; 
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				+ 
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				+static struct mtd_partition sdp_onenand_partitions[] = { 
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				+	{ 
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				+		.name		= "X-Loader-OneNAND", 
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				+		.offset		= 0, 
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				+		.size		= 4 * (64 * 2048), 
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				+		.mask_flags	= MTD_WRITEABLE  /* force read-only */ 
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				+	}, 
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				+	{ 
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				+		.name		= "U-Boot-OneNAND", 
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				+		.offset		= MTDPART_OFS_APPEND, 
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				+		.size		= 2 * (64 * 2048), 
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				+		.mask_flags	= MTD_WRITEABLE  /* force read-only */ 
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				+	}, 
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				+	{ 
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				+		.name		= "U-Boot Environment-OneNAND", 
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				+		.offset		= MTDPART_OFS_APPEND, 
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				+		.size		= 1 * (64 * 2048), 
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				+	}, 
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				+	{ 
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				+		.name		= "Kernel-OneNAND", 
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				+		.offset		= MTDPART_OFS_APPEND, 
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				+		.size		= 16 * (64 * 2048), 
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				+	}, 
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				+	{ 
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				+		.name		= "File System-OneNAND", 
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				+		.offset		= MTDPART_OFS_APPEND, 
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				+		.size		= MTDPART_SIZ_FULL, 
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				+	}, 
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				+}; 
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				+ 
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				+static struct mtd_partition sdp_nand_partitions[] = { 
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				+	/* All the partition sizes are listed in terms of NAND block size */ 
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				+	{ 
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				+		.name		= "X-Loader-NAND", 
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				+		.offset		= 0, 
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				+		.size		= 4 * (64 * 2048), 
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				+		.mask_flags	= MTD_WRITEABLE,	/* force read-only */ 
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				+	}, 
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				+	{ 
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				+		.name		= "U-Boot-NAND", 
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				+		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */ 
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				+		.size		= 10 * (64 * 2048), 
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				+		.mask_flags	= MTD_WRITEABLE,	/* force read-only */ 
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				+	}, 
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				+	{ 
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				+		.name		= "Boot Env-NAND", 
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				+ 
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				+		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x1c0000 */ 
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				+		.size		= 6 * (64 * 2048), 
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				+	}, 
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				+	{ 
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				+		.name		= "Kernel-NAND", 
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				+		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x280000 */ 
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				+		.size		= 40 * (64 * 2048), 
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				+	}, 
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				+	{ 
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				+		.name		= "File System - NAND", 
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				+		.size		= MTDPART_SIZ_FULL, 
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				+		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x780000 */ 
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				+	}, 
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				+}; 
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				+ 
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				+static struct flash_partitions sdp_flash_partitions[] = { 
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				+	{ 
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				+		.parts = sdp_nor_partitions, 
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				+		.nr_parts = ARRAY_SIZE(sdp_nor_partitions), 
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				+	}, 
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				+	{ 
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				+		.parts = sdp_onenand_partitions, 
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				+		.nr_parts = ARRAY_SIZE(sdp_onenand_partitions), 
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				+	}, 
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				+	{ 
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				+		.parts = sdp_nand_partitions, 
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				+		.nr_parts = ARRAY_SIZE(sdp_nand_partitions), 
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				+	}, 
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				+}; 
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				+ 
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				+static void __init omap_3430sdp_init(void) 
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				+{ 
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				+	int gpio_pendown; 
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				+ 
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				+	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 
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				+	omap_hsmmc_init(mmc); 
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				+	omap3430_i2c_init(); 
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				+	omap_display_init(&sdp3430_dss_data); 
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				+	if (omap_rev() > OMAP3430_REV_ES1_0) 
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				+		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2; 
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				+	else 
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				+		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1; 
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				+	omap_ads7846_init(1, gpio_pendown, 310, NULL); 
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				+	omap_serial_init(); 
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				+	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL); 
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				+	usb_musb_init(NULL); 
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				+	board_smc91x_init(); 
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				+	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0); 
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				+	sdp3430_display_init(); 
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				+	enable_board_wakeup_source(); 
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				+	usbhs_init(&usbhs_bdata); 
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				+} 
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				+ 
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				+MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") 
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				+	/* Maintainer: Syed Khasim - Texas Instruments Inc */ 
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				+	.atag_offset	= 0x100, 
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				+	.reserve	= omap_reserve, 
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				+	.map_io		= omap3_map_io, 
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