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@@ -225,3 +225,167 @@ static inline u16 __iomem *isa_mtw(unsigned long addr)
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static inline void isa_delay(void)
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static inline void isa_delay(void)
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{
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{
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switch(ISA_TYPE)
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switch(ISA_TYPE)
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+ {
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+#ifdef CONFIG_Q40
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+ case ISA_TYPE_Q40: isa_outb(0,0x80); break;
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+#endif
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+#ifdef CONFIG_AMIGA_PCMCIA
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+ case ISA_TYPE_AG: break;
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+#endif
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+ default: break; /* avoid warnings */
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+ }
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+}
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+
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+#define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;})
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+#define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();})
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+#define isa_inw_p(p) ({u16 v=isa_inw(p);isa_delay();v;})
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+#define isa_outw_p(v,p) ({isa_outw((v),(p));isa_delay();})
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+#define isa_inl_p(p) ({u32 v=isa_inl(p);isa_delay();v;})
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+#define isa_outl_p(v,p) ({isa_outl((v),(p));isa_delay();})
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+
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+#define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr))
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+#define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr))
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+
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+#define isa_insw(port, buf, nr) \
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+ (ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) : \
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+ raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
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+
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+#define isa_outsw(port, buf, nr) \
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+ (ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \
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+ raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
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+
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+#define isa_insl(port, buf, nr) \
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+ (ISA_SEX ? raw_insl(isa_itl(port), (u32 *)(buf), (nr)) : \
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+ raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
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+
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+#define isa_outsl(port, buf, nr) \
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+ (ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) : \
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+ raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
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+
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+
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+#define inb isa_inb
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+#define inb_p isa_inb_p
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+#define outb isa_outb
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+#define outb_p isa_outb_p
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+#define inw isa_inw
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+#define inw_p isa_inw_p
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+#define outw isa_outw
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+#define outw_p isa_outw_p
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+#define inl isa_inl
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+#define inl_p isa_inl_p
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+#define outl isa_outl
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+#define outl_p isa_outl_p
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+#define insb isa_insb
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+#define insw isa_insw
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+#define insl isa_insl
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+#define outsb isa_outsb
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+#define outsw isa_outsw
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+#define outsl isa_outsl
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+#define readb isa_readb
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+#define readw isa_readw
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+#define writeb isa_writeb
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+#define writew isa_writew
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+
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+#else /* CONFIG_ISA */
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+
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+/*
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+ * We need to define dummy functions for GENERIC_IOMAP support.
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+ */
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+#define inb(port) 0xff
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+#define inb_p(port) 0xff
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+#define outb(val,port) ((void)0)
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+#define outb_p(val,port) ((void)0)
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+#define inw(port) 0xffff
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+#define inw_p(port) 0xffff
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+#define outw(val,port) ((void)0)
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+#define outw_p(val,port) ((void)0)
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+#define inl(port) 0xffffffffUL
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+#define inl_p(port) 0xffffffffUL
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+#define outl(val,port) ((void)0)
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+#define outl_p(val,port) ((void)0)
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+
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+#define insb(port,buf,nr) ((void)0)
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+#define outsb(port,buf,nr) ((void)0)
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+#define insw(port,buf,nr) ((void)0)
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+#define outsw(port,buf,nr) ((void)0)
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+#define insl(port,buf,nr) ((void)0)
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+#define outsl(port,buf,nr) ((void)0)
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+
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+/*
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+ * These should be valid on any ioremap()ed region
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+ */
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+#define readb(addr) in_8(addr)
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+#define writeb(val,addr) out_8((addr),(val))
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+#define readw(addr) in_le16(addr)
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+#define writew(val,addr) out_le16((addr),(val))
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+
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+#endif /* CONFIG_ISA */
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+
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+#define readl(addr) in_le32(addr)
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+#define writel(val,addr) out_le32((addr),(val))
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+
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+#define readsb(port, buf, nr) raw_insb((port), (u8 *)(buf), (nr))
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+#define readsw(port, buf, nr) raw_insw((port), (u16 *)(buf), (nr))
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+#define readsl(port, buf, nr) raw_insl((port), (u32 *)(buf), (nr))
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+#define writesb(port, buf, nr) raw_outsb((port), (u8 *)(buf), (nr))
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+#define writesw(port, buf, nr) raw_outsw((port), (u16 *)(buf), (nr))
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+#define writesl(port, buf, nr) raw_outsl((port), (u32 *)(buf), (nr))
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+
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+#define mmiowb()
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+
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+static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
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+{
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+ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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+}
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+static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
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+{
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+ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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+}
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+static inline void __iomem *ioremap_writethrough(unsigned long physaddr,
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+ unsigned long size)
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+{
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+ return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
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+}
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+static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
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+ unsigned long size)
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+{
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+ return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
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+}
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+
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+static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
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+{
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+ __builtin_memset((void __force *) addr, val, count);
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+}
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+static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
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+{
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+ __builtin_memcpy(dst, (void __force *) src, count);
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+}
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+static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
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+{
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+ __builtin_memcpy((void __force *) dst, src, count);
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+}
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+
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+#ifndef CONFIG_SUN3
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+#define IO_SPACE_LIMIT 0xffff
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+#else
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+#define IO_SPACE_LIMIT 0x0fffffff
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+#endif
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+
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+#endif /* __KERNEL__ */
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+
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+#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
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+
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+/*
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+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
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+ * access
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+ */
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+#define xlate_dev_mem_ptr(p) __va(p)
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+
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+/*
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+ * Convert a virtual cached pointer to an uncached pointer
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+ */
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+#define xlate_dev_kmem_ptr(p) p
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+
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+#define ioport_map(port, nr) ((void __iomem *)(port))
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+
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+#endif /* _IO_H */
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