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+/*
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+ * R8A7740 processor support
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+ *
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+ * Copyright (C) 2011 Renesas Solutions Corp.
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+ * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; version 2 of the
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+ * License.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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+ */
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/sh_pfc.h>
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+#include <mach/r8a7740.h>
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+#include <mach/irqs.h>
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+
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+#define CPU_ALL_PORT(fn, pfx, sfx) \
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+ PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
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+ PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
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+ PORT_10(fn, pfx##20, sfx), \
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+ PORT_1(fn, pfx##210, sfx), PORT_1(fn, pfx##211, sfx)
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+
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+enum {
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+ PINMUX_RESERVED = 0,
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+
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+ /* PORT0_DATA -> PORT211_DATA */
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+ PINMUX_DATA_BEGIN,
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+ PORT_ALL(DATA),
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+ PINMUX_DATA_END,
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+
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+ /* PORT0_IN -> PORT211_IN */
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+ PINMUX_INPUT_BEGIN,
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+ PORT_ALL(IN),
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+ PINMUX_INPUT_END,
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+
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+ /* PORT0_IN_PU -> PORT211_IN_PU */
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+ PINMUX_INPUT_PULLUP_BEGIN,
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+ PORT_ALL(IN_PU),
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+ PINMUX_INPUT_PULLUP_END,
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+
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+ /* PORT0_IN_PD -> PORT211_IN_PD */
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+ PINMUX_INPUT_PULLDOWN_BEGIN,
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+ PORT_ALL(IN_PD),
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+ PINMUX_INPUT_PULLDOWN_END,
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+
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+ /* PORT0_OUT -> PORT211_OUT */
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+ PINMUX_OUTPUT_BEGIN,
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+ PORT_ALL(OUT),
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+ PINMUX_OUTPUT_END,
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+
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+ PINMUX_FUNCTION_BEGIN,
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+ PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT211_FN_IN */
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+ PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT211_FN_OUT */
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+ PORT_ALL(FN0), /* PORT0_FN0 -> PORT211_FN0 */
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+ PORT_ALL(FN1), /* PORT0_FN1 -> PORT211_FN1 */
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+ PORT_ALL(FN2), /* PORT0_FN2 -> PORT211_FN2 */
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+ PORT_ALL(FN3), /* PORT0_FN3 -> PORT211_FN3 */
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+ PORT_ALL(FN4), /* PORT0_FN4 -> PORT211_FN4 */
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+ PORT_ALL(FN5), /* PORT0_FN5 -> PORT211_FN5 */
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+ PORT_ALL(FN6), /* PORT0_FN6 -> PORT211_FN6 */
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+ PORT_ALL(FN7), /* PORT0_FN7 -> PORT211_FN7 */
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+
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+ MSEL1CR_31_0, MSEL1CR_31_1,
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+ MSEL1CR_30_0, MSEL1CR_30_1,
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+ MSEL1CR_29_0, MSEL1CR_29_1,
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+ MSEL1CR_28_0, MSEL1CR_28_1,
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+ MSEL1CR_27_0, MSEL1CR_27_1,
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+ MSEL1CR_26_0, MSEL1CR_26_1,
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+ MSEL1CR_16_0, MSEL1CR_16_1,
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+ MSEL1CR_15_0, MSEL1CR_15_1,
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+ MSEL1CR_14_0, MSEL1CR_14_1,
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+ MSEL1CR_13_0, MSEL1CR_13_1,
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+ MSEL1CR_12_0, MSEL1CR_12_1,
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+ MSEL1CR_9_0, MSEL1CR_9_1,
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+ MSEL1CR_7_0, MSEL1CR_7_1,
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+ MSEL1CR_6_0, MSEL1CR_6_1,
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+ MSEL1CR_5_0, MSEL1CR_5_1,
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+ MSEL1CR_4_0, MSEL1CR_4_1,
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+ MSEL1CR_3_0, MSEL1CR_3_1,
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+ MSEL1CR_2_0, MSEL1CR_2_1,
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+ MSEL1CR_0_0, MSEL1CR_0_1,
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+
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+ MSEL3CR_15_0, MSEL3CR_15_1, /* Trace / Debug ? */
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+ MSEL3CR_6_0, MSEL3CR_6_1,
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+
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+ MSEL4CR_19_0, MSEL4CR_19_1,
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+ MSEL4CR_18_0, MSEL4CR_18_1,
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+ MSEL4CR_15_0, MSEL4CR_15_1,
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+ MSEL4CR_10_0, MSEL4CR_10_1,
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+ MSEL4CR_6_0, MSEL4CR_6_1,
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+ MSEL4CR_4_0, MSEL4CR_4_1,
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+ MSEL4CR_1_0, MSEL4CR_1_1,
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+
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+ MSEL5CR_31_0, MSEL5CR_31_1, /* irq/fiq output */
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+ MSEL5CR_30_0, MSEL5CR_30_1,
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+ MSEL5CR_29_0, MSEL5CR_29_1,
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+ MSEL5CR_27_0, MSEL5CR_27_1,
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+ MSEL5CR_25_0, MSEL5CR_25_1,
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+ MSEL5CR_23_0, MSEL5CR_23_1,
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+ MSEL5CR_21_0, MSEL5CR_21_1,
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+ MSEL5CR_19_0, MSEL5CR_19_1,
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+ MSEL5CR_17_0, MSEL5CR_17_1,
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+ MSEL5CR_15_0, MSEL5CR_15_1,
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+ MSEL5CR_14_0, MSEL5CR_14_1,
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+ MSEL5CR_13_0, MSEL5CR_13_1,
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+ MSEL5CR_12_0, MSEL5CR_12_1,
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+ MSEL5CR_11_0, MSEL5CR_11_1,
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+ MSEL5CR_10_0, MSEL5CR_10_1,
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+ MSEL5CR_8_0, MSEL5CR_8_1,
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+ MSEL5CR_7_0, MSEL5CR_7_1,
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+ MSEL5CR_6_0, MSEL5CR_6_1,
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+ MSEL5CR_5_0, MSEL5CR_5_1,
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+ MSEL5CR_4_0, MSEL5CR_4_1,
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+ MSEL5CR_3_0, MSEL5CR_3_1,
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+ MSEL5CR_2_0, MSEL5CR_2_1,
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+ MSEL5CR_0_0, MSEL5CR_0_1,
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