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@@ -108,3 +108,120 @@ static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs)
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v &= AM33XX_IDLEST_MASK;
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v >>= AM33XX_IDLEST_SHIFT;
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return v;
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+}
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+
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+/**
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+ * _is_module_ready - can module registers be accessed without causing an abort?
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+ * @inst: CM instance register offset (*_INST macro)
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+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
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+ *
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+ * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
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+ * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
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+ */
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+static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
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+{
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+ u32 v;
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+
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+ v = _clkctrl_idlest(inst, cdoffs, clkctrl_offs);
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+
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+ return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
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+ v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
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+}
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+
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+/**
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+ * _clktrctrl_write - write @c to a CM_CLKSTCTRL.CLKTRCTRL register bitfield
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+ * @c: CLKTRCTRL register bitfield (LSB = bit 0, i.e., unshifted)
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+ * @inst: CM instance register offset (*_INST macro)
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+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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+ *
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+ * @c must be the unshifted value for CLKTRCTRL - i.e., this function
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+ * will handle the shift itself.
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+ */
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+static void _clktrctrl_write(u8 c, s16 inst, u16 cdoffs)
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+{
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+ u32 v;
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+
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+ v = am33xx_cm_read_reg(inst, cdoffs);
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+ v &= ~AM33XX_CLKTRCTRL_MASK;
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+ v |= c << AM33XX_CLKTRCTRL_SHIFT;
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+ am33xx_cm_write_reg(v, inst, cdoffs);
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+}
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+
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+/* Public functions */
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+
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+/**
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+ * am33xx_cm_is_clkdm_in_hwsup - is a clockdomain in hwsup idle mode?
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+ * @inst: CM instance register offset (*_INST macro)
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+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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+ *
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+ * Returns true if the clockdomain referred to by (@inst, @cdoffs)
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+ * is in hardware-supervised idle mode, or 0 otherwise.
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+ */
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+bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs)
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+{
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+ u32 v;
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+
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+ v = am33xx_cm_read_reg(inst, cdoffs);
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+ v &= AM33XX_CLKTRCTRL_MASK;
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+ v >>= AM33XX_CLKTRCTRL_SHIFT;
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+
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+ return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? true : false;
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+}
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+
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+/**
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+ * am33xx_cm_clkdm_enable_hwsup - put a clockdomain in hwsup-idle mode
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+ * @inst: CM instance register offset (*_INST macro)
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+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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+ *
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+ * Put a clockdomain referred to by (@inst, @cdoffs) into
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+ * hardware-supervised idle mode. No return value.
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+ */
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+void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs)
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+{
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+ _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);
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+}
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+
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+/**
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+ * am33xx_cm_clkdm_disable_hwsup - put a clockdomain in swsup-idle mode
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+ * @inst: CM instance register offset (*_INST macro)
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+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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+ *
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+ * Put a clockdomain referred to by (@inst, @cdoffs) into
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+ * software-supervised idle mode, i.e., controlled manually by the
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+ * Linux OMAP clockdomain code. No return value.
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+ */
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+void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs)
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+{
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+ _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);
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+}
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+
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+/**
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+ * am33xx_cm_clkdm_force_sleep - try to put a clockdomain into idle
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+ * @inst: CM instance register offset (*_INST macro)
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+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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+ *
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+ * Put a clockdomain referred to by (@inst, @cdoffs) into idle
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+ * No return value.
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+ */
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+void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs)
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+{
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+ _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);
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+}
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+
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+/**
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+ * am33xx_cm_clkdm_force_wakeup - try to take a clockdomain out of idle
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+ * @inst: CM instance register offset (*_INST macro)
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+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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+ *
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+ * Take a clockdomain referred to by (@inst, @cdoffs) out of idle,
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+ * waking it up. No return value.
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+ */
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+void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs)
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+{
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+ _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);
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+}
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+
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+/*
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+ *
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+ */
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