waterDataDiscreteRateMining memoryCall.h 张婷 commit at 2021-04-14

waterDataDiscreteRateMining/dataSharedMemory/memoryCall.h

@@ -627,3 +627,183 @@ struct TT_RTC {
 #define ACIA_D8N2S (4<<2)	/* 8 data, no parity, 2 stop */
 #define ACIA_D8N1S (5<<2)	/* 8 data, no parity, 1 stop */
 #define ACIA_D8E1S (6<<2)	/* 8 data, even parity, 1 stop */
+#define ACIA_D8O1S (7<<2)	/* 8 data, odd parity, 1 stop */
+
+/* transmit control */
+#define ACIA_RLTID (0<<5)	/* RTS low, TxINT disabled */
+#define ACIA_RLTIE (1<<5)	/* RTS low, TxINT enabled */
+#define ACIA_RHTID (2<<5)	/* RTS high, TxINT disabled */
+#define ACIA_RLTIDSB (3<<5)	/* RTS low, TxINT disabled, send break */
+
+/* receive control */
+#define ACIA_RID (0<<7)		/* RxINT disabled */
+#define ACIA_RIE (1<<7)		/* RxINT enabled */
+
+/* status fields of the ACIA */
+#define ACIA_RDRF 1		/* Receive Data Register Full */
+#define ACIA_TDRE (1<<1)	/* Transmit Data Register Empty */
+#define ACIA_DCD  (1<<2)	/* Data Carrier Detect */
+#define ACIA_CTS  (1<<3)	/* Clear To Send */
+#define ACIA_FE   (1<<4)	/* Framing Error */
+#define ACIA_OVRN (1<<5)	/* Receiver Overrun */
+#define ACIA_PE   (1<<6)	/* Parity Error */
+#define ACIA_IRQ  (1<<7)	/* Interrupt Request */
+
+#define ACIA_BAS (0xfffffc00)
+struct ACIA
+ {
+  u_char key_ctrl;
+  u_char char_dummy1;
+  u_char key_data;
+  u_char char_dummy2;
+  u_char mid_ctrl;
+  u_char char_dummy3;
+  u_char mid_data;
+ };
+# define acia ((*(volatile struct ACIA*)ACIA_BAS))
+
+#define	TT_DMASND_BAS (0xffff8900)
+struct TT_DMASND {
+	u_char	int_ctrl;	/* Falcon: Interrupt control */
+	u_char	ctrl;
+	u_char	pad2;
+	u_char	bas_hi;
+	u_char	pad3;
+	u_char	bas_mid;
+	u_char	pad4;
+	u_char	bas_low;
+	u_char	pad5;
+	u_char	addr_hi;
+	u_char	pad6;
+	u_char	addr_mid;
+	u_char	pad7;
+	u_char	addr_low;
+	u_char	pad8;
+	u_char	end_hi;
+	u_char	pad9;
+	u_char	end_mid;
+	u_char	pad10;
+	u_char	end_low;
+	u_char	pad11[12];
+	u_char	track_select;	/* Falcon */
+	u_char	mode;
+	u_char	pad12[14];
+	/* Falcon only: */
+	u_short	cbar_src;
+	u_short cbar_dst;
+	u_char	ext_div;
+	u_char	int_div;
+	u_char	rec_track_select;
+	u_char	dac_src;
+	u_char	adc_src;
+	u_char	input_gain;
+	u_short	output_atten;
+};
+# define tt_dmasnd ((*(volatile struct TT_DMASND *)TT_DMASND_BAS))
+
+#define DMASND_MFP_INT_REPLAY     0x01
+#define DMASND_MFP_INT_RECORD     0x02
+#define DMASND_TIMERA_INT_REPLAY  0x04
+#define DMASND_TIMERA_INT_RECORD  0x08
+
+#define	DMASND_CTRL_OFF		  0x00
+#define	DMASND_CTRL_ON		  0x01
+#define	DMASND_CTRL_REPEAT	  0x02
+#define DMASND_CTRL_RECORD_ON     0x10
+#define DMASND_CTRL_RECORD_OFF    0x00
+#define DMASND_CTRL_RECORD_REPEAT 0x20
+#define DMASND_CTRL_SELECT_REPLAY 0x00
+#define DMASND_CTRL_SELECT_RECORD 0x80
+#define	DMASND_MODE_MONO	  0x80
+#define	DMASND_MODE_STEREO	  0x00
+#define DMASND_MODE_8BIT	  0x00
+#define DMASND_MODE_16BIT	  0x40	/* Falcon only */
+#define	DMASND_MODE_6KHZ	  0x00	/* Falcon: mute */
+#define	DMASND_MODE_12KHZ	  0x01
+#define	DMASND_MODE_25KHZ	  0x02
+#define	DMASND_MODE_50KHZ	  0x03
+
+
+#define DMASNDSetBase(bufstart)						\
+    do {								\
+	tt_dmasnd.bas_hi  = (unsigned char)(((bufstart) & 0xff0000) >> 16); \
+	tt_dmasnd.bas_mid = (unsigned char)(((bufstart) & 0x00ff00) >> 8); \
+	tt_dmasnd.bas_low = (unsigned char) ((bufstart) & 0x0000ff); \
+    } while( 0 )
+
+#define DMASNDGetAdr() ((tt_dmasnd.addr_hi << 16) +	\
+			(tt_dmasnd.addr_mid << 8) +	\
+			(tt_dmasnd.addr_low))
+
+#define DMASNDSetEnd(bufend)				\
+    do {						\
+	tt_dmasnd.end_hi  = (unsigned char)(((bufend) & 0xff0000) >> 16); \
+	tt_dmasnd.end_mid = (unsigned char)(((bufend) & 0x00ff00) >> 8); \
+	tt_dmasnd.end_low = (unsigned char) ((bufend) & 0x0000ff); \
+    } while( 0 )
+
+
+#define	TT_MICROWIRE_BAS	(0xffff8922)
+struct TT_MICROWIRE {
+	u_short	data;
+	u_short	mask;
+};
+# define tt_microwire ((*(volatile struct TT_MICROWIRE *)TT_MICROWIRE_BAS))
+
+#define	MW_LM1992_ADDR		0x0400
+
+#define	MW_LM1992_VOLUME(dB)	\
+    (0x0c0 | ((dB) < -80 ? 0 : (dB) > 0 ? 40 : (((dB) + 80) / 2)))
+#define	MW_LM1992_BALLEFT(dB)	\
+    (0x140 | ((dB) < -40 ? 0 : (dB) > 0 ? 20 : (((dB) + 40) / 2)))
+#define	MW_LM1992_BALRIGHT(dB)	\
+    (0x100 | ((dB) < -40 ? 0 : (dB) > 0 ? 20 : (((dB) + 40) / 2)))
+#define	MW_LM1992_TREBLE(dB)	\
+    (0x080 | ((dB) < -12 ? 0 : (dB) > 12 ? 12 : (((dB) / 2) + 6)))
+#define	MW_LM1992_BASS(dB)	\
+    (0x040 | ((dB) < -12 ? 0 : (dB) > 12 ? 12 : (((dB) / 2) + 6)))
+
+#define	MW_LM1992_PSG_LOW	0x000
+#define	MW_LM1992_PSG_HIGH	0x001
+#define	MW_LM1992_PSG_OFF	0x002
+
+#define MSTE_RTC_BAS	(0xfffffc21)
+
+struct MSTE_RTC {
+	u_char sec_ones;
+	u_char dummy1;
+	u_char sec_tens;
+	u_char dummy2;
+	u_char min_ones;
+	u_char dummy3;
+	u_char min_tens;
+	u_char dummy4;
+	u_char hr_ones;
+	u_char dummy5;
+	u_char hr_tens;
+	u_char dummy6;
+	u_char weekday;
+	u_char dummy7;
+	u_char day_ones;
+	u_char dummy8;
+	u_char day_tens;
+	u_char dummy9;
+	u_char mon_ones;
+	u_char dummy10;
+	u_char mon_tens;
+	u_char dummy11;
+	u_char year_ones;
+	u_char dummy12;
+	u_char year_tens;
+	u_char dummy13;
+	u_char mode;
+	u_char dummy14;
+	u_char test;
+	u_char dummy15;
+	u_char reset;
+};
+
+#define mste_rtc ((*(volatile struct MSTE_RTC *)MSTE_RTC_BAS))
+
+#endif /* linux/atarihw.h */
+