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@@ -278,3 +278,202 @@ static inline void omap_init_spi100k(void)
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}
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#endif
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+
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+#define OMAP1_CAMERA_BASE 0xfffb6800
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+#define OMAP1_CAMERA_IOSIZE 0x1c
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+
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+static struct resource omap1_camera_resources[] = {
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+ [0] = {
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+ .start = OMAP1_CAMERA_BASE,
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+ .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = INT_CAMERA,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);
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+
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+static struct platform_device omap1_camera_device = {
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+ .name = "omap1-camera",
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+ .id = 0, /* This is used to put cameras on this interface */
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+ .dev = {
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+ .dma_mask = &omap1_camera_dma_mask,
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+ .coherent_dma_mask = DMA_BIT_MASK(32),
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+ },
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+ .num_resources = ARRAY_SIZE(omap1_camera_resources),
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+ .resource = omap1_camera_resources,
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+};
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+
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+void __init omap1_camera_init(void *info)
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+{
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+ struct platform_device *dev = &omap1_camera_device;
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+ int ret;
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+
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+ dev->dev.platform_data = info;
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+
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+ ret = platform_device_register(dev);
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+ if (ret)
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+ dev_err(&dev->dev, "unable to register device: %d\n", ret);
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+}
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+
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+
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+/*-------------------------------------------------------------------------*/
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+
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+static inline void omap_init_sti(void) {}
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+
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+/* Numbering for the SPI-capable controllers when used for SPI:
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+ * spi = 1
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+ * uwire = 2
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+ * mmc1..2 = 3..4
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+ * mcbsp1..3 = 5..7
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+ */
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+
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+#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
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+
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+#define OMAP_UWIRE_BASE 0xfffb3000
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+
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+static struct resource uwire_resources[] = {
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+ {
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+ .start = OMAP_UWIRE_BASE,
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+ .end = OMAP_UWIRE_BASE + 0x20,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static struct platform_device omap_uwire_device = {
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+ .name = "omap_uwire",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(uwire_resources),
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+ .resource = uwire_resources,
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+};
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+
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+static void omap_init_uwire(void)
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+{
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+ /* FIXME define and use a boot tag; not all boards will be hooking
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+ * up devices to the microwire controller, and multi-board configs
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+ * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
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+ */
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+
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+ /* board-specific code must configure chipselects (only a few
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+ * are normally used) and SCLK/SDI/SDO (each has two choices).
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+ */
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+ (void) platform_device_register(&omap_uwire_device);
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+}
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+#else
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+static inline void omap_init_uwire(void) {}
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+#endif
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+
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+
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+#define OMAP1_RNG_BASE 0xfffe5000
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+
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+static struct resource omap1_rng_resources[] = {
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+ {
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+ .start = OMAP1_RNG_BASE,
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+ .end = OMAP1_RNG_BASE + 0x4f,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static struct platform_device omap1_rng_device = {
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+ .name = "omap_rng",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(omap1_rng_resources),
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+ .resource = omap1_rng_resources,
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+};
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+
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+static void omap1_init_rng(void)
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+{
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+ if (!cpu_is_omap16xx())
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+ return;
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+
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+ (void) platform_device_register(&omap1_rng_device);
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+}
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+
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+/*-------------------------------------------------------------------------*/
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+
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+/*
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+ * This gets called after board-specific INIT_MACHINE, and initializes most
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+ * on-chip peripherals accessible on this board (except for few like USB):
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+ *
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+ * (a) Does any "standard config" pin muxing needed. Board-specific
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+ * code will have muxed GPIO pins and done "nonstandard" setup;
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+ * that code could live in the boot loader.
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+ * (b) Populating board-specific platform_data with the data drivers
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+ * rely on to handle wiring variations.
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+ * (c) Creating platform devices as meaningful on this board and
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+ * with this kernel configuration.
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+ *
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+ * Claiming GPIOs, and setting their direction and initial values, is the
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+ * responsibility of the device drivers. So is responding to probe().
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+ *
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+ * Board-specific knowledge like creating devices or pin setup is to be
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+ * kept out of drivers as much as possible. In particular, pin setup
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+ * may be handled by the boot loader, and drivers should expect it will
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+ * normally have been done by the time they're probed.
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+ */
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+static int __init omap1_init_devices(void)
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+{
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+ if (!cpu_class_is_omap1())
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+ return -ENODEV;
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+
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+ omap_sram_init();
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+ omap1_clk_late_init();
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+
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+ /* please keep these calls, and their implementations above,
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+ * in alphabetical order so they're easier to sort through.
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+ */
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+
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+ omap_init_audio();
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+ omap_init_mbox();
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+ omap_init_rtc();
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+ omap_init_spi100k();
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+ omap_init_sti();
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+ omap_init_uwire();
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+ omap1_init_rng();
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+
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+ return 0;
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+}
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+arch_initcall(omap1_init_devices);
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+
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+#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
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+
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+static struct resource wdt_resources[] = {
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+ {
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+ .start = 0xfffeb000,
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+ .end = 0xfffeb07F,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static struct platform_device omap_wdt_device = {
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+ .name = "omap_wdt",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(wdt_resources),
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+ .resource = wdt_resources,
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+};
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+
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+static int __init omap_init_wdt(void)
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+{
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+ struct omap_wd_timer_platform_data pdata;
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+ int ret;
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+
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+ if (!cpu_is_omap16xx())
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+ return -ENODEV;
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+
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+ pdata.read_reset_sources = omap1_get_reset_sources;
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+
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+ ret = platform_device_register(&omap_wdt_device);
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+ if (!ret) {
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+ ret = platform_device_add_data(&omap_wdt_device, &pdata,
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+ sizeof(pdata));
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+ if (ret)
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+ platform_device_del(&omap_wdt_device);
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+ }
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+
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+ return ret;
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+}
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+subsys_initcall(omap_init_wdt);
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+#endif
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