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@@ -924,3 +924,65 @@
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/* CONTROL_HDMI_TX_PHY */
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/* CONTROL_HDMI_TX_PHY */
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#define OMAP4_HDMITXPHY_PADORDER_SHIFT 31
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#define OMAP4_HDMITXPHY_PADORDER_SHIFT 31
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+#define OMAP4_HDMITXPHY_PADORDER_MASK (1 << 31)
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+#define OMAP4_HDMITXPHY_TXVALID_SHIFT 30
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+#define OMAP4_HDMITXPHY_TXVALID_MASK (1 << 30)
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+#define OMAP4_HDMITXPHY_ENBYPASSCLK_SHIFT 29
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+#define OMAP4_HDMITXPHY_ENBYPASSCLK_MASK (1 << 29)
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+#define OMAP4_HDMITXPHY_PD_PULLUPDET_SHIFT 28
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+#define OMAP4_HDMITXPHY_PD_PULLUPDET_MASK (1 << 28)
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+
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+/* CONTROL_MMC2 */
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+#define OMAP4_MMC2_FEEDBACK_CLK_SEL_SHIFT 31
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+#define OMAP4_MMC2_FEEDBACK_CLK_SEL_MASK (1 << 31)
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+
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+/* CONTROL_DSIPHY */
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+#define OMAP4_DSI2_LANEENABLE_SHIFT 29
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+#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
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+#define OMAP4_DSI1_LANEENABLE_SHIFT 24
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+#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
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+#define OMAP4_DSI1_PIPD_SHIFT 19
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+#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
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+#define OMAP4_DSI2_PIPD_SHIFT 14
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+#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
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+
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+/* CONTROL_MCBSPLP */
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+#define OMAP4_ALBCTRLRX_FSX_SHIFT 31
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+#define OMAP4_ALBCTRLRX_FSX_MASK (1 << 31)
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+#define OMAP4_ALBCTRLRX_CLKX_SHIFT 30
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+#define OMAP4_ALBCTRLRX_CLKX_MASK (1 << 30)
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+#define OMAP4_ABE_MCBSP1_DR_EN_SHIFT 29
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+#define OMAP4_ABE_MCBSP1_DR_EN_MASK (1 << 29)
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+
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+/* CONTROL_USB2PHYCORE */
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+#define OMAP4_USB2PHY_AUTORESUME_EN_SHIFT 31
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+#define OMAP4_USB2PHY_AUTORESUME_EN_MASK (1 << 31)
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+#define OMAP4_USB2PHY_DISCHGDET_SHIFT 30
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+#define OMAP4_USB2PHY_DISCHGDET_MASK (1 << 30)
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+#define OMAP4_USB2PHY_GPIOMODE_SHIFT 29
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+#define OMAP4_USB2PHY_GPIOMODE_MASK (1 << 29)
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+#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_SHIFT 28
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+#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_MASK (1 << 28)
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+#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_SHIFT 27
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+#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_MASK (1 << 27)
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+#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_SHIFT 26
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+#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_MASK (1 << 26)
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+#define OMAP4_USB2PHY_CHG_VSRC_EN_SHIFT 25
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+#define OMAP4_USB2PHY_CHG_VSRC_EN_MASK (1 << 25)
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+#define OMAP4_USB2PHY_CHG_ISINK_EN_SHIFT 24
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+#define OMAP4_USB2PHY_CHG_ISINK_EN_MASK (1 << 24)
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+#define OMAP4_USB2PHY_CHG_DET_STATUS_SHIFT 21
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+#define OMAP4_USB2PHY_CHG_DET_STATUS_MASK (0x7 << 21)
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+#define OMAP4_USB2PHY_CHG_DET_DM_COMP_SHIFT 20
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+#define OMAP4_USB2PHY_CHG_DET_DM_COMP_MASK (1 << 20)
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+#define OMAP4_USB2PHY_CHG_DET_DP_COMP_SHIFT 19
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+#define OMAP4_USB2PHY_CHG_DET_DP_COMP_MASK (1 << 19)
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+#define OMAP4_USB2PHY_DATADET_SHIFT 18
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+#define OMAP4_USB2PHY_DATADET_MASK (1 << 18)
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+#define OMAP4_USB2PHY_SINKONDP_SHIFT 17
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+#define OMAP4_USB2PHY_SINKONDP_MASK (1 << 17)
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+#define OMAP4_USB2PHY_SRCONDM_SHIFT 16
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+#define OMAP4_USB2PHY_SRCONDM_MASK (1 << 16)
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+#define OMAP4_USB2PHY_RESTARTCHGDET_SHIFT 15
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+#define OMAP4_USB2PHY_RESTARTCHGDET_MASK (1 << 15)
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+#define OMAP4_USB2PHY_CHGDETDONE_SHIFT 14
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