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+/* include/asm-m68knommu/MC68VZ328.h: 'VZ328 control registers
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+ *
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+ * Copyright (c) 2000-2001 Lineo Inc. <www.lineo.com>
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+ * Copyright (c) 2000-2001 Lineo Canada Corp. <www.lineo.ca>
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+ * Copyright (C) 1999 Vladimir Gurevich <vgurevic@cisco.com>
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+ * Bare & Hare Software, Inc.
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+ * Based on include/asm-m68knommu/MC68332.h
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+ * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>,
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+ * The Silver Hammer Group, Ltd.
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+ *
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+ * M68VZ328 fixes by Evan Stawnyczy <evan@lineo.com>
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+ * vz multiport fixes by Michael Leslie <mleslie@lineo.com>
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+ */
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+
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+#ifndef _MC68VZ328_H_
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+#define _MC68VZ328_H_
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+
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+#define BYTE_REF(addr) (*((volatile unsigned char*)addr))
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+#define WORD_REF(addr) (*((volatile unsigned short*)addr))
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+#define LONG_REF(addr) (*((volatile unsigned long*)addr))
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+
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+#define PUT_FIELD(field, val) (((val) << field##_SHIFT) & field##_MASK)
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+#define GET_FIELD(reg, field) (((reg) & field##_MASK) >> field##_SHIFT)
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+
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+/**********
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+ *
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+ * 0xFFFFF0xx -- System Control
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+ *
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+ **********/
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+
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+/*
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+ * System Control Register (SCR)
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+ */
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+#define SCR_ADDR 0xfffff000
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+#define SCR BYTE_REF(SCR_ADDR)
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+
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+#define SCR_WDTH8 0x01 /* 8-Bit Width Select */
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+#define SCR_DMAP 0x04 /* Double Map */
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+#define SCR_SO 0x08 /* Supervisor Only */
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+#define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
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+#define SCR_PRV 0x20 /* Privilege Violation */
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+#define SCR_WPV 0x40 /* Write Protect Violation */
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+#define SCR_BETO 0x80 /* Bus-Error TimeOut */
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+
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+/*
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+ * Silicon ID Register (Mask Revision Register (MRR) for '328 Compatibility)
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+ */
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+#define MRR_ADDR 0xfffff004
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+#define MRR LONG_REF(MRR_ADDR)
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+
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+/**********
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+ *
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+ * 0xFFFFF1xx -- Chip-Select logic
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+ *
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+ **********/
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+
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+/*
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+ * Chip Select Group Base Registers
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+ */
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+#define CSGBA_ADDR 0xfffff100
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+#define CSGBB_ADDR 0xfffff102
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+
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+#define CSGBC_ADDR 0xfffff104
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+#define CSGBD_ADDR 0xfffff106
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+
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+#define CSGBA WORD_REF(CSGBA_ADDR)
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+#define CSGBB WORD_REF(CSGBB_ADDR)
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+#define CSGBC WORD_REF(CSGBC_ADDR)
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