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+/*
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+ * Copyright (C) 2009 Integration Software and Electronic Engineering.
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+ *
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+ * Modified from mach-omap2/board-generic.c
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/delay.h>
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+#include <linux/err.h>
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+#include <linux/clk.h>
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+#include <linux/io.h>
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+#include <linux/gpio.h>
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+#include <linux/interrupt.h>
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+#include <linux/input.h>
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+
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+#include <linux/regulator/machine.h>
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+#include <linux/regulator/fixed.h>
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+#include <linux/i2c/twl.h>
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+#include <linux/mmc/host.h>
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+
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+#include <linux/mtd/nand.h>
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+
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+#include <asm/mach-types.h>
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+#include <asm/mach/arch.h>
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+
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+#include <video/omapdss.h>
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+#include <video/omap-panel-tfp410.h>
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+#include <linux/platform_data/mtd-onenand-omap2.h>
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+
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+#include "common.h"
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+#include "gpmc.h"
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+#include "mux.h"
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+#include "hsmmc.h"
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+#include "sdram-numonyx-m65kxxxxam.h"
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+#include "common-board-devices.h"
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+#include "board-flash.h"
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+#include "control.h"
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+#include "gpmc-onenand.h"
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+
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+#define IGEP2_SMSC911X_CS 5
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+#define IGEP2_SMSC911X_GPIO 176
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+#define IGEP2_GPIO_USBH_NRESET 24
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+#define IGEP2_GPIO_LED0_GREEN 26
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+#define IGEP2_GPIO_LED0_RED 27
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+#define IGEP2_GPIO_LED1_RED 28
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+#define IGEP2_GPIO_DVI_PUP 170
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+
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+#define IGEP2_RB_GPIO_WIFI_NPD 94
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+#define IGEP2_RB_GPIO_WIFI_NRESET 95
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+#define IGEP2_RB_GPIO_BT_NRESET 137
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+#define IGEP2_RC_GPIO_WIFI_NPD 138
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+#define IGEP2_RC_GPIO_WIFI_NRESET 139
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+#define IGEP2_RC_GPIO_BT_NRESET 137
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+
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+#define IGEP3_GPIO_LED0_GREEN 54
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+#define IGEP3_GPIO_LED0_RED 53
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+#define IGEP3_GPIO_LED1_RED 16
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+#define IGEP3_GPIO_USBH_NRESET 183
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+
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+#define IGEP_SYSBOOT_MASK 0x1f
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+#define IGEP_SYSBOOT_NAND 0x0f
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+#define IGEP_SYSBOOT_ONENAND 0x10
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+
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+/*
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+ * IGEP2 Hardware Revision Table
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+ *
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+ * --------------------------------------------------------------------------
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+ * | Id. | Hw Rev. | HW0 (28) | WIFI_NPD | WIFI_NRESET | BT_NRESET |
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+ * --------------------------------------------------------------------------
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+ * | 0 | B | high | gpio94 | gpio95 | - |
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+ * | 0 | B/C (B-compatible) | high | gpio94 | gpio95 | gpio137 |
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+ * | 1 | C | low | gpio138 | gpio139 | gpio137 |
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+ * --------------------------------------------------------------------------
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+ */
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+
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+#define IGEP2_BOARD_HWREV_B 0
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+#define IGEP2_BOARD_HWREV_C 1
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+#define IGEP3_BOARD_HWREV 2
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+
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+static u8 hwrev;
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+
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+static void __init igep2_get_revision(void)
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+{
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+ u8 ret;
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+
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+ if (machine_is_igep0030()) {
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+ hwrev = IGEP3_BOARD_HWREV;
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+ return;
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+ }
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+
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+ omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT);
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+
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+ if (gpio_request_one(IGEP2_GPIO_LED1_RED, GPIOF_IN, "GPIO_HW0_REV")) {
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+ pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n");
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+ pr_err("IGEP2: Unknown Hardware Revision\n");
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+ return;
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+ }
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+
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+ ret = gpio_get_value(IGEP2_GPIO_LED1_RED);
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+ if (ret == 0) {
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+ pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n");
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+ hwrev = IGEP2_BOARD_HWREV_C;
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+ } else if (ret == 1) {
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+ pr_info("IGEP2: Hardware Revision B/C (B compatible)\n");
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+ hwrev = IGEP2_BOARD_HWREV_B;
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+ } else {
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+ pr_err("IGEP2: Unknown Hardware Revision\n");
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+ hwrev = -1;
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+ }
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+
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+ gpio_free(IGEP2_GPIO_LED1_RED);
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+}
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+
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+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
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+ defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
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+ defined(CONFIG_MTD_NAND_OMAP2) || \
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+ defined(CONFIG_MTD_NAND_OMAP2_MODULE)
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+
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+#define ONENAND_MAP 0x20000000
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+
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+/* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY )
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+ * Since the device is equipped with two DataRAMs, and two-plane NAND
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+ * Flash memory array, these two component enables simultaneous program
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