|
@@ -369,3 +369,75 @@ static struct clockdomain l3_dss_44xx_clkdm = {
|
|
|
.cm_inst = OMAP4430_CM2_DSS_INST,
|
|
|
.clkdm_offs = OMAP4430_CM2_DSS_DSS_CDOFFS,
|
|
|
.dep_bit = OMAP4430_DSS_STATDEP_SHIFT,
|
|
|
+ .wkdep_srcs = l3_dss_wkup_sleep_deps,
|
|
|
+ .sleepdep_srcs = l3_dss_wkup_sleep_deps,
|
|
|
+ .flags = CLKDM_CAN_HWSUP_SWSUP,
|
|
|
+};
|
|
|
+
|
|
|
+static struct clockdomain l4_wkup_44xx_clkdm = {
|
|
|
+ .name = "l4_wkup_clkdm",
|
|
|
+ .pwrdm = { .name = "wkup_pwrdm" },
|
|
|
+ .prcm_partition = OMAP4430_PRM_PARTITION,
|
|
|
+ .cm_inst = OMAP4430_PRM_WKUP_CM_INST,
|
|
|
+ .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
|
|
|
+ .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT,
|
|
|
+ .flags = CLKDM_CAN_HWSUP | CLKDM_ACTIVE_WITH_MPU,
|
|
|
+};
|
|
|
+
|
|
|
+static struct clockdomain emu_sys_44xx_clkdm = {
|
|
|
+ .name = "emu_sys_clkdm",
|
|
|
+ .pwrdm = { .name = "emu_pwrdm" },
|
|
|
+ .prcm_partition = OMAP4430_PRM_PARTITION,
|
|
|
+ .cm_inst = OMAP4430_PRM_EMU_CM_INST,
|
|
|
+ .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
|
|
|
+ .flags = (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP |
|
|
|
+ CLKDM_MISSING_IDLE_REPORTING),
|
|
|
+};
|
|
|
+
|
|
|
+static struct clockdomain l3_dma_44xx_clkdm = {
|
|
|
+ .name = "l3_dma_clkdm",
|
|
|
+ .pwrdm = { .name = "core_pwrdm" },
|
|
|
+ .prcm_partition = OMAP4430_CM2_PARTITION,
|
|
|
+ .cm_inst = OMAP4430_CM2_CORE_INST,
|
|
|
+ .clkdm_offs = OMAP4430_CM2_CORE_SDMA_CDOFFS,
|
|
|
+ .wkdep_srcs = l3_dma_wkup_sleep_deps,
|
|
|
+ .sleepdep_srcs = l3_dma_wkup_sleep_deps,
|
|
|
+ .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
|
|
|
+};
|
|
|
+
|
|
|
+/* As clockdomains are added or removed above, this list must also be changed */
|
|
|
+static struct clockdomain *clockdomains_omap44xx[] __initdata = {
|
|
|
+ &l4_cefuse_44xx_clkdm,
|
|
|
+ &l4_cfg_44xx_clkdm,
|
|
|
+ &tesla_44xx_clkdm,
|
|
|
+ &l3_gfx_44xx_clkdm,
|
|
|
+ &ivahd_44xx_clkdm,
|
|
|
+ &l4_secure_44xx_clkdm,
|
|
|
+ &l4_per_44xx_clkdm,
|
|
|
+ &abe_44xx_clkdm,
|
|
|
+ &l3_instr_44xx_clkdm,
|
|
|
+ &l3_init_44xx_clkdm,
|
|
|
+ &d2d_44xx_clkdm,
|
|
|
+ &mpu0_44xx_clkdm,
|
|
|
+ &mpu1_44xx_clkdm,
|
|
|
+ &l3_emif_44xx_clkdm,
|
|
|
+ &l4_ao_44xx_clkdm,
|
|
|
+ &ducati_44xx_clkdm,
|
|
|
+ &mpu_44xx_clkdm,
|
|
|
+ &l3_2_44xx_clkdm,
|
|
|
+ &l3_1_44xx_clkdm,
|
|
|
+ &iss_44xx_clkdm,
|
|
|
+ &l3_dss_44xx_clkdm,
|
|
|
+ &l4_wkup_44xx_clkdm,
|
|
|
+ &emu_sys_44xx_clkdm,
|
|
|
+ &l3_dma_44xx_clkdm,
|
|
|
+ NULL
|
|
|
+};
|
|
|
+
|
|
|
+
|
|
|
+void __init omap44xx_clockdomains_init(void)
|
|
|
+{
|
|
|
+ clkdm_register_platform_funcs(&omap4_clkdm_operations);
|
|
|
+ clkdm_register_clkdms(clockdomains_omap44xx);
|
|
|
+ clkdm_complete_init();
|
|
|
+}
|