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@@ -693,3 +693,137 @@ ia64_sal_clear_state_info (u64 sal_info_type)
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/* Get the processor and platform information logged by SAL with respect to the machine
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/* Get the processor and platform information logged by SAL with respect to the machine
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* state at the time of the MCAs, INITs, CMCs, or CPEs.
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* state at the time of the MCAs, INITs, CMCs, or CPEs.
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+ */
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+static inline u64
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+ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
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+ sal_info, 0, 0, 0, 0);
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+ if (isrv.status)
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+ return 0;
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+
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+ return isrv.v0;
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+}
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+
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+/*
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+ * Get the maximum size of the information logged by SAL with respect to the machine state
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+ * at the time of MCAs, INITs, CMCs, or CPEs.
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+ */
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+static inline u64
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+ia64_sal_get_state_info_size (u64 sal_info_type)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
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+ 0, 0, 0, 0, 0);
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+ if (isrv.status)
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+ return 0;
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+ return isrv.v0;
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+}
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+
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+/*
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+ * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
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+ * the monarch processor. Must not lock, because it will not return on any cpu until the
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+ * monarch processor sends a wake up.
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+ */
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+static inline s64
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+ia64_sal_mc_rendez (void)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
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+ return isrv.status;
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+}
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+
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+/*
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+ * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
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+ * the machine check rendezvous sequence as well as the mechanism to wake up the
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+ * non-monarch processor at the end of machine check processing.
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+ * Returns the complete ia64_sal_retval because some calls return more than just a status
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+ * value.
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+ */
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+static inline struct ia64_sal_retval
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+ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
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+ timeout, rz_always, 0, 0);
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+ return isrv;
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+}
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+
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+/* Read from PCI configuration space */
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+static inline s64
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+ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
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+ if (value)
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+ *value = isrv.v0;
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+ return isrv.status;
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+}
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+
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+/* Write to PCI configuration space */
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+static inline s64
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+ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
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+ type, 0, 0, 0);
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+ return isrv.status;
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+}
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+
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+/*
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+ * Register physical addresses of locations needed by SAL when SAL procedures are invoked
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+ * in virtual mode.
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+ */
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+static inline s64
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+ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
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+ 0, 0, 0, 0, 0);
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+ return isrv.status;
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+}
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+
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+/*
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+ * Register software dependent code locations within SAL. These locations are handlers or
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+ * entry points where SAL will pass control for the specified event. These event handlers
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+ * are for the bott rendezvous, MCAs and INIT scenarios.
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+ */
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+static inline s64
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+ia64_sal_set_vectors (u64 vector_type,
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+ u64 handler_addr1, u64 gp1, u64 handler_len1,
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+ u64 handler_addr2, u64 gp2, u64 handler_len2)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
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+ handler_addr1, gp1, handler_len1,
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+ handler_addr2, gp2, handler_len2);
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+
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+ return isrv.status;
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+}
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+
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+/* Update the contents of PAL block in the non-volatile storage device */
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+static inline s64
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+ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
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+ u64 *error_code, u64 *scratch_buf_size_needed)
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+{
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+ struct ia64_sal_retval isrv;
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+ SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
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+ 0, 0, 0, 0);
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+ if (error_code)
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+ *error_code = isrv.v0;
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+ if (scratch_buf_size_needed)
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+ *scratch_buf_size_needed = isrv.v1;
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+ return isrv.status;
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+}
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+
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+/* Get physical processor die mapping in the platform. */
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+static inline s64
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+ia64_sal_physical_id_info(u16 *splid)
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+{
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+ struct ia64_sal_retval isrv;
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+
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+ if (sal_revision < SAL_VERSION_CODE(3,2))
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+ return -1;
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+
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+ SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
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