|  | @@ -302,3 +302,103 @@ static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = {
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				|  |  |   *   properly adapted to omap_hwmod / omap_device
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				|  |  |   *
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				|  |  |   * usim
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				|  |  | + */
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * 'aess' class
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				|  |  | + * audio engine sub system
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				|  |  | + */
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				|  |  | +
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				|  |  | +static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc = {
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				|  |  | +	.rev_offs	= 0x0000,
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				|  |  | +	.sysc_offs	= 0x0010,
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				|  |  | +	.sysc_flags	= (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
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				|  |  | +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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				|  |  | +			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART |
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				|  |  | +			   MSTANDBY_SMART_WKUP),
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				|  |  | +	.sysc_fields	= &omap_hwmod_sysc_type2,
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct omap_hwmod_class omap44xx_aess_hwmod_class = {
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				|  |  | +	.name	= "aess",
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				|  |  | +	.sysc	= &omap44xx_aess_sysc,
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				|  |  | +};
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				|  |  | +
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				|  |  | +/* aess */
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				|  |  | +static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = {
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				|  |  | +	{ .irq = 99 + OMAP44XX_IRQ_GIC_START },
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				|  |  | +	{ .irq = -1 }
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {
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				|  |  | +	{ .name = "fifo0", .dma_req = 100 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .name = "fifo1", .dma_req = 101 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .name = "fifo2", .dma_req = 102 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .name = "fifo3", .dma_req = 103 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .name = "fifo4", .dma_req = 104 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .dma_req = -1 }
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct omap_hwmod omap44xx_aess_hwmod = {
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				|  |  | +	.name		= "aess",
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				|  |  | +	.class		= &omap44xx_aess_hwmod_class,
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				|  |  | +	.clkdm_name	= "abe_clkdm",
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				|  |  | +	.mpu_irqs	= omap44xx_aess_irqs,
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				|  |  | +	.sdma_reqs	= omap44xx_aess_sdma_reqs,
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				|  |  | +	.main_clk	= "aess_fck",
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				|  |  | +	.prcm = {
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				|  |  | +		.omap4 = {
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				|  |  | +			.clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET,
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				|  |  | +			.context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET,
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				|  |  | +			.lostcontext_mask = OMAP4430_LOSTCONTEXT_DFF_MASK,
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				|  |  | +			.modulemode   = MODULEMODE_SWCTRL,
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				|  |  | +		},
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				|  |  | +	},
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				|  |  | +};
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * 'c2c' class
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				|  |  | + * chip 2 chip interface used to plug the ape soc (omap) with an external modem
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				|  |  | + * soc
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				|  |  | + */
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				|  |  | +
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				|  |  | +static struct omap_hwmod_class omap44xx_c2c_hwmod_class = {
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				|  |  | +	.name	= "c2c",
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				|  |  | +};
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				|  |  | +
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				|  |  | +/* c2c */
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				|  |  | +static struct omap_hwmod_irq_info omap44xx_c2c_irqs[] = {
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				|  |  | +	{ .irq = 88 + OMAP44XX_IRQ_GIC_START },
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				|  |  | +	{ .irq = -1 }
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct omap_hwmod_dma_info omap44xx_c2c_sdma_reqs[] = {
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				|  |  | +	{ .dma_req = 68 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .dma_req = -1 }
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct omap_hwmod omap44xx_c2c_hwmod = {
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				|  |  | +	.name		= "c2c",
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				|  |  | +	.class		= &omap44xx_c2c_hwmod_class,
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				|  |  | +	.clkdm_name	= "d2d_clkdm",
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				|  |  | +	.mpu_irqs	= omap44xx_c2c_irqs,
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				|  |  | +	.sdma_reqs	= omap44xx_c2c_sdma_reqs,
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				|  |  | +	.prcm = {
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				|  |  | +		.omap4 = {
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				|  |  | +			.clkctrl_offs = OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET,
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				|  |  | +			.context_offs = OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET,
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				|  |  | +		},
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				|  |  | +	},
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				|  |  | +};
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * 'counter' class
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				|  |  | + * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
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				|  |  | + */
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				|  |  | +
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				|  |  | +static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
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				|  |  | +	.rev_offs	= 0x0000,
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				|  |  | +	.sysc_offs	= 0x0004,
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