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@@ -359,3 +359,100 @@ typedef struct scc_param {
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ushort scc_ibc; /* Internal */
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uint scc_rxtmp; /* Internal */
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uint scc_tstate; /* Internal */
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+ uint scc_tdp; /* Internal */
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+ ushort scc_tbptr; /* Internal */
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+ ushort scc_tbc; /* Internal */
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+ uint scc_txtmp; /* Internal */
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+ uint scc_rcrc; /* Internal */
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+ uint scc_tcrc; /* Internal */
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+} sccp_t;
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+
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+
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+/* Function code bits.
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+ */
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+#define SCC_EB ((u_char)0x10) /* Set big endian byte order */
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+#define SCC_FC_DMA ((u_char)0x08) /* Set SDMA */
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+
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+/* CPM Ethernet through SCC1.
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+ */
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+typedef struct scc_enet {
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+ sccp_t sen_genscc;
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+ uint sen_cpres; /* Preset CRC */
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+ uint sen_cmask; /* Constant mask for CRC */
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+ uint sen_crcec; /* CRC Error counter */
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+ uint sen_alec; /* alignment error counter */
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+ uint sen_disfc; /* discard frame counter */
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+ ushort sen_pads; /* Tx short frame pad character */
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+ ushort sen_retlim; /* Retry limit threshold */
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+ ushort sen_retcnt; /* Retry limit counter */
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+ ushort sen_maxflr; /* maximum frame length register */
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+ ushort sen_minflr; /* minimum frame length register */
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+ ushort sen_maxd1; /* maximum DMA1 length */
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+ ushort sen_maxd2; /* maximum DMA2 length */
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+ ushort sen_maxd; /* Rx max DMA */
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+ ushort sen_dmacnt; /* Rx DMA counter */
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+ ushort sen_maxb; /* Max BD byte count */
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+ ushort sen_gaddr1; /* Group address filter */
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+ ushort sen_gaddr2;
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+ ushort sen_gaddr3;
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+ ushort sen_gaddr4;
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+ uint sen_tbuf0data0; /* Save area 0 - current frame */
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+ uint sen_tbuf0data1; /* Save area 1 - current frame */
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+ uint sen_tbuf0rba; /* Internal */
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+ uint sen_tbuf0crc; /* Internal */
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+ ushort sen_tbuf0bcnt; /* Internal */
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+ ushort sen_paddrh; /* physical address (MSB) */
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+ ushort sen_paddrm;
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+ ushort sen_paddrl; /* physical address (LSB) */
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+ ushort sen_pper; /* persistence */
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+ ushort sen_rfbdptr; /* Rx first BD pointer */
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+ ushort sen_tfbdptr; /* Tx first BD pointer */
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+ ushort sen_tlbdptr; /* Tx last BD pointer */
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+ uint sen_tbuf1data0; /* Save area 0 - current frame */
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+ uint sen_tbuf1data1; /* Save area 1 - current frame */
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+ uint sen_tbuf1rba; /* Internal */
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+ uint sen_tbuf1crc; /* Internal */
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+ ushort sen_tbuf1bcnt; /* Internal */
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+ ushort sen_txlen; /* Tx Frame length counter */
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+ ushort sen_iaddr1; /* Individual address filter */
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+ ushort sen_iaddr2;
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+ ushort sen_iaddr3;
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+ ushort sen_iaddr4;
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+ ushort sen_boffcnt; /* Backoff counter */
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+
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+ /* NOTE: Some versions of the manual have the following items
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+ * incorrectly documented. Below is the proper order.
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+ */
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+ ushort sen_taddrh; /* temp address (MSB) */
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+ ushort sen_taddrm;
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+ ushort sen_taddrl; /* temp address (LSB) */
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+} scc_enet_t;
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+
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+
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+
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+#if defined (CONFIG_UCQUICC)
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+/* uCquicc has the following signals connected to Ethernet:
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+ * 68360 - lxt905
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+ * PA0/RXD1 - rxd
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+ * PA1/TXD1 - txd
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+ * PA8/CLK1 - tclk
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+ * PA9/CLK2 - rclk
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+ * PC0/!RTS1 - t_en
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+ * PC1/!CTS1 - col
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+ * PC5/!CD1 - cd
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+ */
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+#define PA_ENET_RXD PA_RXD1
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+#define PA_ENET_TXD PA_TXD1
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+#define PA_ENET_TCLK PA_CLK1
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+#define PA_ENET_RCLK PA_CLK2
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+#define PC_ENET_TENA PC_RTS1
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+#define PC_ENET_CLSN PC_CTS1
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+#define PC_ENET_RENA PC_CD1
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+
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+/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to
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+ * SCC1.
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+ */
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+#define SICR_ENET_MASK ((uint)0x000000ff)
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+#define SICR_ENET_CLKRT ((uint)0x0000002c)
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+
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+#endif /* config_ucquicc */
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吉超博