|
@@ -522,3 +522,63 @@ static void rc_pci_fixup(struct pci_dev *dev)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
|
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
|
|
|
|
+
|
|
|
|
+static int orion5x_pci_disabled __initdata;
|
|
|
|
+
|
|
|
|
+void __init orion5x_pci_disable(void)
|
|
|
|
+{
|
|
|
|
+ orion5x_pci_disabled = 1;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void __init orion5x_pci_set_cardbus_mode(void)
|
|
|
|
+{
|
|
|
|
+ orion5x_pci_cardbus_mode = 1;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
|
|
|
|
+{
|
|
|
|
+ int ret = 0;
|
|
|
|
+
|
|
|
|
+ vga_base = ORION5X_PCIE_MEM_PHYS_BASE;
|
|
|
|
+
|
|
|
|
+ if (nr == 0) {
|
|
|
|
+ orion_pcie_set_local_bus_nr(PCIE_BASE, sys->busnr);
|
|
|
|
+ ret = pcie_setup(sys);
|
|
|
|
+ } else if (nr == 1 && !orion5x_pci_disabled) {
|
|
|
|
+ orion5x_pci_set_bus_nr(sys->busnr);
|
|
|
|
+ ret = pci_setup(sys);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return ret;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys)
|
|
|
|
+{
|
|
|
|
+ struct pci_bus *bus;
|
|
|
|
+
|
|
|
|
+ if (nr == 0) {
|
|
|
|
+ bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
|
|
|
|
+ &sys->resources);
|
|
|
|
+ } else if (nr == 1 && !orion5x_pci_disabled) {
|
|
|
|
+ bus = pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
|
|
|
|
+ &sys->resources);
|
|
|
|
+ } else {
|
|
|
|
+ bus = NULL;
|
|
|
|
+ BUG();
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return bus;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
|
|
|
+{
|
|
|
|
+ int bus = dev->bus->number;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * PCIe endpoint?
|
|
|
|
+ */
|
|
|
|
+ if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
|
|
|
|
+ return IRQ_ORION5X_PCIE0_INT;
|
|
|
|
+
|
|
|
|
+ return -1;
|
|
|
|
+}
|