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@@ -219,3 +219,165 @@ static struct clk_lookup periph_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
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CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
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+ CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
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+ CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
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+};
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+
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+static struct clk_lookup usart_clocks_lookups[] = {
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+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
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+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
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+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
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+ CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
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+};
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+
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+/*
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+ * The four programmable clocks.
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+ * You must configure pin multiplexing to bring these signals out.
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+ */
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+static struct clk pck0 = {
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+ .name = "pck0",
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+ .pmc_mask = AT91_PMC_PCK0,
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+ .type = CLK_TYPE_PROGRAMMABLE,
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+ .id = 0,
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+};
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+static struct clk pck1 = {
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+ .name = "pck1",
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+ .pmc_mask = AT91_PMC_PCK1,
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+ .type = CLK_TYPE_PROGRAMMABLE,
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+ .id = 1,
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+};
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+static struct clk pck2 = {
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+ .name = "pck2",
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+ .pmc_mask = AT91_PMC_PCK2,
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+ .type = CLK_TYPE_PROGRAMMABLE,
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+ .id = 2,
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+};
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+static struct clk pck3 = {
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+ .name = "pck3",
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+ .pmc_mask = AT91_PMC_PCK3,
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+ .type = CLK_TYPE_PROGRAMMABLE,
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+ .id = 3,
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+};
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+
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+static void __init at91sam9263_register_clocks(void)
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+{
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
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+ clk_register(periph_clocks[i]);
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+
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+ clkdev_add_table(periph_clocks_lookups,
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+ ARRAY_SIZE(periph_clocks_lookups));
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+ clkdev_add_table(usart_clocks_lookups,
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+ ARRAY_SIZE(usart_clocks_lookups));
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+
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+ clk_register(&pck0);
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+ clk_register(&pck1);
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+ clk_register(&pck2);
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+ clk_register(&pck3);
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+}
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+
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+/* --------------------------------------------------------------------
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+ * GPIO
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+ * -------------------------------------------------------------------- */
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+
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+static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
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+ {
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+ .id = AT91SAM9263_ID_PIOA,
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+ .regbase = AT91SAM9263_BASE_PIOA,
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+ }, {
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+ .id = AT91SAM9263_ID_PIOB,
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+ .regbase = AT91SAM9263_BASE_PIOB,
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+ }, {
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+ .id = AT91SAM9263_ID_PIOCDE,
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+ .regbase = AT91SAM9263_BASE_PIOC,
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+ }, {
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+ .id = AT91SAM9263_ID_PIOCDE,
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+ .regbase = AT91SAM9263_BASE_PIOD,
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+ }, {
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+ .id = AT91SAM9263_ID_PIOCDE,
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+ .regbase = AT91SAM9263_BASE_PIOE,
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+ }
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+};
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+
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+/* --------------------------------------------------------------------
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+ * AT91SAM9263 processor initialization
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+ * -------------------------------------------------------------------- */
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+
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+static void __init at91sam9263_map_io(void)
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+{
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+ at91_init_sram(0, AT91SAM9263_SRAM0_BASE, AT91SAM9263_SRAM0_SIZE);
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+ at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
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+}
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+
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+static void __init at91sam9263_ioremap_registers(void)
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+{
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+ at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
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+ at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
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+ at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
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+ at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
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+ at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
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+ at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
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+ at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
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+ at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
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+}
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+
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+static void __init at91sam9263_initialize(void)
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+{
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+ arm_pm_idle = at91sam9_idle;
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+ arm_pm_restart = at91sam9_alt_restart;
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+ at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
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+
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+ /* Register GPIO subsystem */
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+ at91_gpio_init(at91sam9263_gpio, 5);
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+}
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+
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+/* --------------------------------------------------------------------
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+ * Interrupt initialization
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+ * -------------------------------------------------------------------- */
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+
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+/*
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+ * The default interrupt priority levels (0 = lowest, 7 = highest).
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+ */
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+static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
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+ 7, /* Advanced Interrupt Controller (FIQ) */
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+ 7, /* System Peripherals */
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+ 1, /* Parallel IO Controller A */
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+ 1, /* Parallel IO Controller B */
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+ 1, /* Parallel IO Controller C, D and E */
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+ 0,
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+ 0,
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+ 5, /* USART 0 */
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+ 5, /* USART 1 */
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+ 5, /* USART 2 */
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+ 0, /* Multimedia Card Interface 0 */
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+ 0, /* Multimedia Card Interface 1 */
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+ 3, /* CAN */
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+ 6, /* Two-Wire Interface */
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+ 5, /* Serial Peripheral Interface 0 */
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+ 5, /* Serial Peripheral Interface 1 */
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+ 4, /* Serial Synchronous Controller 0 */
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+ 4, /* Serial Synchronous Controller 1 */
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+ 5, /* AC97 Controller */
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+ 0, /* Timer Counter 0, 1 and 2 */
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+ 0, /* Pulse Width Modulation Controller */
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+ 3, /* Ethernet */
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+ 0,
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+ 0, /* 2D Graphic Engine */
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+ 2, /* USB Device Port */
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+ 0, /* Image Sensor Interface */
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+ 3, /* LDC Controller */
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+ 0, /* DMA Controller */
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+ 0,
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+ 2, /* USB Host port */
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+ 0, /* Advanced Interrupt Controller (IRQ0) */
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+ 0, /* Advanced Interrupt Controller (IRQ1) */
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+};
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+
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+AT91_SOC_START(sam9263)
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+ .map_io = at91sam9263_map_io,
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+ .default_irq_priority = at91sam9263_default_irq_priority,
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+ .ioremap_registers = at91sam9263_ioremap_registers,
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+ .register_clocks = at91sam9263_register_clocks,
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+ .init = at91sam9263_initialize,
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+AT91_SOC_END
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