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@@ -0,0 +1,55 @@
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+/*
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+ * Copyright 2011 Freescale Semiconductor, Inc.
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+ * Copyright 2011 Linaro Ltd.
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/types.h>
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+#include <linux/clk.h>
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+#include <linux/clkdev.h>
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/of.h>
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+#include <linux/of_address.h>
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+#include <linux/of_irq.h>
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+
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+#include "clk.h"
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+#include "common.h"
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+
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+#define CCGR0 0x68
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+#define CCGR1 0x6c
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+#define CCGR2 0x70
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+#define CCGR3 0x74
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+#define CCGR4 0x78
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+#define CCGR5 0x7c
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+#define CCGR6 0x80
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+#define CCGR7 0x84
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+
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+#define CLPCR 0x54
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+#define BP_CLPCR_LPM 0
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+#define BM_CLPCR_LPM (0x3 << 0)
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+#define BM_CLPCR_BYPASS_PMIC_READY (0x1 << 2)
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+#define BM_CLPCR_ARM_CLK_DIS_ON_LPM (0x1 << 5)
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+#define BM_CLPCR_SBYOS (0x1 << 6)
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+#define BM_CLPCR_DIS_REF_OSC (0x1 << 7)
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+#define BM_CLPCR_VSTBY (0x1 << 8)
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+#define BP_CLPCR_STBY_COUNT 9
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+#define BM_CLPCR_STBY_COUNT (0x3 << 9)
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+#define BM_CLPCR_COSC_PWRDOWN (0x1 << 11)
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+#define BM_CLPCR_WB_PER_AT_LPM (0x1 << 16)
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+#define BM_CLPCR_WB_CORE_AT_LPM (0x1 << 17)
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+#define BM_CLPCR_BYP_MMDC_CH0_LPM_HS (0x1 << 19)
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+#define BM_CLPCR_BYP_MMDC_CH1_LPM_HS (0x1 << 21)
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+#define BM_CLPCR_MASK_CORE0_WFI (0x1 << 22)
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+#define BM_CLPCR_MASK_CORE1_WFI (0x1 << 23)
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+#define BM_CLPCR_MASK_CORE2_WFI (0x1 << 24)
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+#define BM_CLPCR_MASK_CORE3_WFI (0x1 << 25)
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+#define BM_CLPCR_MASK_SCU_IDLE (0x1 << 26)
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+#define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27)
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