|
@@ -208,3 +208,195 @@ static struct regulator_consumer_supply tps65023_dcdc3_consumers[] = {
|
|
|
|
|
|
/* 1.8V Aux LDO, not used */
|
|
|
static struct regulator_consumer_supply tps65023_ldo1_consumers[] = {
|
|
|
+ {
|
|
|
+ .supply = "1.8v_aux",
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+/* FPGA VCC Aux (2.5 or 3.3) LDO */
|
|
|
+static struct regulator_consumer_supply tps65023_ldo2_consumers[] = {
|
|
|
+ {
|
|
|
+ .supply = "vccaux",
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct regulator_init_data tps65023_regulator_data[] = {
|
|
|
+ /* dcdc1 */
|
|
|
+ {
|
|
|
+ .constraints = {
|
|
|
+ .min_uV = 1150000,
|
|
|
+ .max_uV = 1350000,
|
|
|
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
|
|
+ REGULATOR_CHANGE_STATUS,
|
|
|
+ .boot_on = 1,
|
|
|
+ },
|
|
|
+ .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc1_consumers),
|
|
|
+ .consumer_supplies = tps65023_dcdc1_consumers,
|
|
|
+ },
|
|
|
+ /* dcdc2 */
|
|
|
+ {
|
|
|
+ .constraints = {
|
|
|
+ .min_uV = 1800000,
|
|
|
+ .max_uV = 1800000,
|
|
|
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
|
|
+ .boot_on = 1,
|
|
|
+ },
|
|
|
+ .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc2_consumers),
|
|
|
+ .consumer_supplies = tps65023_dcdc2_consumers,
|
|
|
+ },
|
|
|
+ /* dcdc3 */
|
|
|
+ {
|
|
|
+ .constraints = {
|
|
|
+ .min_uV = 1200000,
|
|
|
+ .max_uV = 1200000,
|
|
|
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
|
|
+ .boot_on = 1,
|
|
|
+ },
|
|
|
+ .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc3_consumers),
|
|
|
+ .consumer_supplies = tps65023_dcdc3_consumers,
|
|
|
+ },
|
|
|
+ /* ldo1 */
|
|
|
+ {
|
|
|
+ .constraints = {
|
|
|
+ .min_uV = 1800000,
|
|
|
+ .max_uV = 1800000,
|
|
|
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
|
|
+ .boot_on = 1,
|
|
|
+ },
|
|
|
+ .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo1_consumers),
|
|
|
+ .consumer_supplies = tps65023_ldo1_consumers,
|
|
|
+ },
|
|
|
+ /* ldo2 */
|
|
|
+ {
|
|
|
+ .constraints = {
|
|
|
+ .min_uV = 2500000,
|
|
|
+ .max_uV = 3300000,
|
|
|
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
|
|
+ REGULATOR_CHANGE_STATUS,
|
|
|
+ .boot_on = 1,
|
|
|
+ },
|
|
|
+ .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo2_consumers),
|
|
|
+ .consumer_supplies = tps65023_ldo2_consumers,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct i2c_board_info __initdata mityomap_tps65023_info[] = {
|
|
|
+ {
|
|
|
+ I2C_BOARD_INFO("tps65023", 0x48),
|
|
|
+ .platform_data = &tps65023_regulator_data[0],
|
|
|
+ },
|
|
|
+ {
|
|
|
+ I2C_BOARD_INFO("24c02", 0x50),
|
|
|
+ .platform_data = &mityomapl138_fd_chip,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static int __init pmic_tps65023_init(void)
|
|
|
+{
|
|
|
+ return i2c_register_board_info(1, mityomap_tps65023_info,
|
|
|
+ ARRAY_SIZE(mityomap_tps65023_info));
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * SPI Devices:
|
|
|
+ * SPI1_CS0: 8M Flash ST-M25P64-VME6G
|
|
|
+ */
|
|
|
+static struct mtd_partition spi_flash_partitions[] = {
|
|
|
+ [0] = {
|
|
|
+ .name = "ubl",
|
|
|
+ .offset = 0,
|
|
|
+ .size = SZ_64K,
|
|
|
+ .mask_flags = MTD_WRITEABLE,
|
|
|
+ },
|
|
|
+ [1] = {
|
|
|
+ .name = "u-boot",
|
|
|
+ .offset = MTDPART_OFS_APPEND,
|
|
|
+ .size = SZ_512K,
|
|
|
+ .mask_flags = MTD_WRITEABLE,
|
|
|
+ },
|
|
|
+ [2] = {
|
|
|
+ .name = "u-boot-env",
|
|
|
+ .offset = MTDPART_OFS_APPEND,
|
|
|
+ .size = SZ_64K,
|
|
|
+ .mask_flags = MTD_WRITEABLE,
|
|
|
+ },
|
|
|
+ [3] = {
|
|
|
+ .name = "periph-config",
|
|
|
+ .offset = MTDPART_OFS_APPEND,
|
|
|
+ .size = SZ_64K,
|
|
|
+ .mask_flags = MTD_WRITEABLE,
|
|
|
+ },
|
|
|
+ [4] = {
|
|
|
+ .name = "reserved",
|
|
|
+ .offset = MTDPART_OFS_APPEND,
|
|
|
+ .size = SZ_256K + SZ_64K,
|
|
|
+ },
|
|
|
+ [5] = {
|
|
|
+ .name = "kernel",
|
|
|
+ .offset = MTDPART_OFS_APPEND,
|
|
|
+ .size = SZ_2M + SZ_1M,
|
|
|
+ },
|
|
|
+ [6] = {
|
|
|
+ .name = "fpga",
|
|
|
+ .offset = MTDPART_OFS_APPEND,
|
|
|
+ .size = SZ_2M,
|
|
|
+ },
|
|
|
+ [7] = {
|
|
|
+ .name = "spare",
|
|
|
+ .offset = MTDPART_OFS_APPEND,
|
|
|
+ .size = MTDPART_SIZ_FULL,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct flash_platform_data mityomapl138_spi_flash_data = {
|
|
|
+ .name = "m25p80",
|
|
|
+ .parts = spi_flash_partitions,
|
|
|
+ .nr_parts = ARRAY_SIZE(spi_flash_partitions),
|
|
|
+ .type = "m24p64",
|
|
|
+};
|
|
|
+
|
|
|
+static struct davinci_spi_config spi_eprom_config = {
|
|
|
+ .io_type = SPI_IO_TYPE_DMA,
|
|
|
+ .c2tdelay = 8,
|
|
|
+ .t2cdelay = 8,
|
|
|
+};
|
|
|
+
|
|
|
+static struct spi_board_info mityomapl138_spi_flash_info[] = {
|
|
|
+ {
|
|
|
+ .modalias = "m25p80",
|
|
|
+ .platform_data = &mityomapl138_spi_flash_data,
|
|
|
+ .controller_data = &spi_eprom_config,
|
|
|
+ .mode = SPI_MODE_0,
|
|
|
+ .max_speed_hz = 30000000,
|
|
|
+ .bus_num = 1,
|
|
|
+ .chip_select = 0,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+/*
|
|
|
+ * MityDSP-L138 includes a 256 MByte large-page NAND flash
|
|
|
+ * (128K blocks).
|
|
|
+ */
|
|
|
+static struct mtd_partition mityomapl138_nandflash_partition[] = {
|
|
|
+ {
|
|
|
+ .name = "rootfs",
|
|
|
+ .offset = 0,
|
|
|
+ .size = SZ_128M,
|
|
|
+ .mask_flags = 0, /* MTD_WRITEABLE, */
|
|
|
+ },
|
|
|
+ {
|
|
|
+ .name = "homefs",
|
|
|
+ .offset = MTDPART_OFS_APPEND,
|
|
|
+ .size = MTDPART_SIZ_FULL,
|
|
|
+ .mask_flags = 0,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static struct davinci_nand_pdata mityomapl138_nandflash_data = {
|
|
|
+ .parts = mityomapl138_nandflash_partition,
|
|
|
+ .nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
|
|
|
+ .ecc_mode = NAND_ECC_HW,
|
|
|
+ .bbt_options = NAND_BBT_USE_FLASH,
|
|
|
+ .options = NAND_BUSWIDTH_16,
|
|
|
+ .ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
|
|
|
+};
|