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@@ -375,3 +375,58 @@
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#define NETX_DPMAS_INT_EN_WDG (1<<29)
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#define NETX_DPMAS_INT_EN_WDG (1<<29)
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#define NETX_DPMAS_INT_EN_PIO72 (1<<28)
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#define NETX_DPMAS_INT_EN_PIO72 (1<<28)
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#define NETX_DPMAS_INT_EN_PIO47 (1<<27)
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#define NETX_DPMAS_INT_EN_PIO47 (1<<27)
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+#define NETX_DPMAS_INT_EN_PIO40 (1<<26)
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+#define NETX_DPMAS_INT_EN_PIO36 (1<<25)
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+#define NETX_DPMAS_INT_EN_PIO35 (1<<24)
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+
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+#define NETX_DPMAS_IF_CONF0_HIF_DISABLED (0<<28)
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+#define NETX_DPMAS_IF_CONF0_HIF_EXT_BUS (1<<28)
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+#define NETX_DPMAS_IF_CONF0_HIF_UP_8BIT (2<<28)
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+#define NETX_DPMAS_IF_CONF0_HIF_UP_16BIT (3<<28)
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+#define NETX_DPMAS_IF_CONF0_HIF_IO (4<<28)
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+#define NETX_DPMAS_IF_CONF0_WAIT_DRV_PP (1<<14)
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+#define NETX_DPMAS_IF_CONF0_WAIT_DRV_OD (2<<14)
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+#define NETX_DPMAS_IF_CONF0_WAIT_DRV_TRI (3<<14)
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+
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+#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO35 (1<<26)
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+#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO36 (1<<27)
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+#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO40 (1<<28)
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+#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO47 (1<<29)
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+#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO72 (1<<30)
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+
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+#define NETX_EXT_CONFIG_TALEWIDTH(x) (((x) & 0x7) << 29)
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+#define NETX_EXT_CONFIG_TADRHOLD(x) (((x) & 0x7) << 26)
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+#define NETX_EXT_CONFIG_TCSON(x) (((x) & 0x7) << 23)
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+#define NETX_EXT_CONFIG_TRDON(x) (((x) & 0x7) << 20)
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+#define NETX_EXT_CONFIG_TWRON(x) (((x) & 0x7) << 17)
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+#define NETX_EXT_CONFIG_TWROFF(x) (((x) & 0x1f) << 12)
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+#define NETX_EXT_CONFIG_TRDWRCYC(x) (((x) & 0x1f) << 7)
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+#define NETX_EXT_CONFIG_WAIT_POL (1<<6)
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+#define NETX_EXT_CONFIG_WAIT_EN (1<<5)
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+#define NETX_EXT_CONFIG_NRD_MODE (1<<4)
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+#define NETX_EXT_CONFIG_DS_MODE (1<<3)
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+#define NETX_EXT_CONFIG_NWR_MODE (1<<2)
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+#define NETX_EXT_CONFIG_16BIT (1<<1)
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+#define NETX_EXT_CONFIG_CS_ENABLE (1<<0)
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+
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+#define NETX_DPMAS_IO_MODE0_WRL (1<<13)
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+#define NETX_DPMAS_IO_MODE0_WAIT (1<<14)
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+#define NETX_DPMAS_IO_MODE0_READY (1<<15)
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+#define NETX_DPMAS_IO_MODE0_CS0 (1<<19)
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+#define NETX_DPMAS_IO_MODE0_EXTRD (1<<20)
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+
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+#define NETX_DPMAS_IO_MODE1_CS2 (1<<15)
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+#define NETX_DPMAS_IO_MODE1_CS1 (1<<16)
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+#define NETX_DPMAS_IO_MODE1_SAMPLE_NPOR (0<<30)
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+#define NETX_DPMAS_IO_MODE1_SAMPLE_100MHZ (1<<30)
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+#define NETX_DPMAS_IO_MODE1_SAMPLE_NPIO36 (2<<30)
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+#define NETX_DPMAS_IO_MODE1_SAMPLE_PIO36 (3<<30)
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+
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+/*******************************
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+ * I2C *
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+ *******************************/
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+#define NETX_I2C_REG(ofs) IOMEM(NETX_VA_I2C, (ofs))
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+#define NETX_I2C_CTRL NETX_I2C_REG(0x0)
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+#define NETX_I2C_DATA NETX_I2C_REG(0x4)
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+
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+#endif /* __ASM_ARCH_NETX_REGS_H */
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