|  | @@ -175,3 +175,61 @@ inline int check_gpio(unsigned gpio)
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				|  |  |  	    || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
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				|  |  |  		return -EINVAL;
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				|  |  |  #endif
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				|  |  | +	if (gpio >= MAX_BLACKFIN_GPIOS)
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				|  |  | +		return -EINVAL;
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				|  |  | +	return 0;
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				|  |  | +}
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				|  |  | +
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				|  |  | +static void port_setup(unsigned gpio, unsigned short usage)
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				|  |  | +{
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				|  |  | +#if defined(BF538_FAMILY)
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				|  |  | +	/*
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				|  |  | +	 * BF538/9 Port C,D and E are special.
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				|  |  | +	 * Inverted PORT_FER polarity on CDE and no PORF_FER on F
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				|  |  | +	 * Regular PORT F GPIOs are handled here, CDE are exclusively
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				|  |  | +	 * managed by GPIOLIB
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				|  |  | +	 */
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				|  |  | +
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				|  |  | +	if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
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				|  |  | +		return;
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				|  |  | +
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				|  |  | +	gpio -= MAX_BLACKFIN_GPIOS;
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				|  |  | +
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				|  |  | +	if (usage == GPIO_USAGE)
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				|  |  | +		*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
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				|  |  | +	else
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				|  |  | +		*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
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				|  |  | +	SSYNC();
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				|  |  | +	return;
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				|  |  | +#endif
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				|  |  | +
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				|  |  | +	if (check_gpio(gpio))
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				|  |  | +		return;
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				|  |  | +
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				|  |  | +#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
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				|  |  | +	if (usage == GPIO_USAGE)
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				|  |  | +		*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
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				|  |  | +	else
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				|  |  | +		*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
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				|  |  | +	SSYNC();
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				|  |  | +#elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
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				|  |  | +	if (usage == GPIO_USAGE)
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				|  |  | +		gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
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				|  |  | +	else
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				|  |  | +		gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
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				|  |  | +	SSYNC();
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				|  |  | +#endif
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				|  |  | +}
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				|  |  | +
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				|  |  | +#ifdef BF537_FAMILY
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				|  |  | +static const s8 port_mux[] = {
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				|  |  | +	[GPIO_PF0] = 3,
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				|  |  | +	[GPIO_PF1] = 3,
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				|  |  | +	[GPIO_PF2] = 4,
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				|  |  | +	[GPIO_PF3] = 4,
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				|  |  | +	[GPIO_PF4] = 5,
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				|  |  | +	[GPIO_PF5] = 6,
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				|  |  | +	[GPIO_PF6] = 7,
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				|  |  | +	[GPIO_PF7] = 8,
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				|  |  | +	[GPIO_PF8 ... GPIO_PF15] = -1,
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				|  |  | +	[GPIO_PG0 ... GPIO_PG7] = -1,
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