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@@ -506,3 +506,117 @@ static const __initdata struct i2c_init_data omap4_i2c_timing_data[] = {
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.loadbits = 0x1,
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.hsscll_38_4 = 11,
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.hsscll_26 = 10,
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+ .hsscll_19_2 = 9,
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+ .hsscll_16_8 = 9,
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+ .hsscll_12 = 8,
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+ },
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+ {
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+ .load = 0,
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+ .loadbits = 0x0,
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+ .hsscll_38_4 = 12,
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+ .hsscll_26 = 10,
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+ .hsscll_19_2 = 9,
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+ .hsscll_16_8 = 8,
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+ .hsscll_12 = 8,
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+ },
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+};
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+
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+/**
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+ * omap4_vc_i2c_timing_init - sets up board I2C timing parameters
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+ * @voltdm: voltagedomain pointer to get data from
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+ *
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+ * Use PMIC + board supplied settings for calculating the total I2C
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+ * channel capacitance and set the timing parameters based on this.
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+ * Pre-calculated values are provided in data tables, as it is not
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+ * too straightforward to calculate these runtime.
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+ */
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+static void __init omap4_vc_i2c_timing_init(struct voltagedomain *voltdm)
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+{
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+ u32 capacitance;
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+ u32 val;
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+ u16 hsscll;
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+ const struct i2c_init_data *i2c_data;
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+
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+ if (!voltdm->pmic->i2c_high_speed) {
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+ pr_warn("%s: only high speed supported!\n", __func__);
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+ return;
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+ }
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+
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+ /* PCB trace capacitance, 0.125pF / mm => mm / 8 */
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+ capacitance = DIV_ROUND_UP(sr_i2c_pcb_length, 8);
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+
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+ /* OMAP pad capacitance */
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+ capacitance += 4;
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+
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+ /* PMIC pad capacitance */
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+ capacitance += voltdm->pmic->i2c_pad_load;
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+
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+ /* Search for capacitance match in the table */
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+ i2c_data = omap4_i2c_timing_data;
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+
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+ while (i2c_data->load > capacitance)
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+ i2c_data++;
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+
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+ /* Select proper values based on sysclk frequency */
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+ switch (voltdm->sys_clk.rate) {
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+ case 38400000:
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+ hsscll = i2c_data->hsscll_38_4;
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+ break;
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+ case 26000000:
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+ hsscll = i2c_data->hsscll_26;
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+ break;
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+ case 19200000:
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+ hsscll = i2c_data->hsscll_19_2;
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+ break;
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+ case 16800000:
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+ hsscll = i2c_data->hsscll_16_8;
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+ break;
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+ case 12000000:
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+ hsscll = i2c_data->hsscll_12;
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+ break;
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+ default:
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+ pr_warn("%s: unsupported sysclk rate: %d!\n", __func__,
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+ voltdm->sys_clk.rate);
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+ return;
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+ }
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+
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+ /* Loadbits define pull setup for the I2C channels */
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+ val = i2c_data->loadbits << 25 | i2c_data->loadbits << 29;
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+
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+ /* Write to SYSCTRL_PADCONF_WKUP_CTRL_I2C_2 to setup I2C pull */
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+ __raw_writel(val, OMAP2_L4_IO_ADDRESS(OMAP4_CTRL_MODULE_PAD_WKUP +
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+ OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2));
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+
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+ /* HSSCLH can always be zero */
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+ val = hsscll << OMAP4430_HSSCLL_SHIFT;
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+ val |= (0x28 << OMAP4430_SCLL_SHIFT | 0x2c << OMAP4430_SCLH_SHIFT);
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+
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+ /* Write setup times to I2C config register */
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+ voltdm->write(val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
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+}
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+
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+
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+
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+/**
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+ * omap_vc_i2c_init - initialize I2C interface to PMIC
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+ * @voltdm: voltage domain containing VC data
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+ *
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+ * Use PMIC supplied settings for I2C high-speed mode and
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+ * master code (if set) and program the VC I2C configuration
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+ * register.
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+ *
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+ * The VC I2C configuration is common to all VC channels,
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+ * so this function only configures I2C for the first VC
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+ * channel registers. All other VC channels will use the
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+ * same configuration.
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+ */
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+static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
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+{
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+ struct omap_vc_channel *vc = voltdm->vc;
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+ static bool initialized;
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+ static bool i2c_high_speed;
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+ u8 mcode;
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+
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+ if (initialized) {
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+ if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
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+ pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",
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李欣儒