|  | @@ -124,3 +124,7 @@ struct bfin_eppi3_regs {
 | 
	
		
			
				|  |  |  #define EPPI_CTL_POLC0                  0x00000000    /* POLC: Clock/Sync polarity mode 0 */
 | 
	
		
			
				|  |  |  #define EPPI_CTL_POLC1                  0x00001000    /* POLC: Clock/Sync polarity mode 1 */
 | 
	
		
			
				|  |  |  #define EPPI_CTL_POLC2                  0x00002000    /* POLC: Clock/Sync polarity mode 2 */
 | 
	
		
			
				|  |  | +#define EPPI_CTL_POLC3                  0x00003000    /* POLC: Clock/Sync polarity mode 3 */
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				|  |  | +#define EPPI_CTL_POLS                   0x0000C000    /* Frame Sync Polarity */
 | 
	
		
			
				|  |  | +#define EPPI_CTL_FS1HI_FS2HI            0x00000000    /* POLS: FS1 and FS2 are active high */
 | 
	
		
			
				|  |  | +#define EPPI_CTL_FS1LO_FS2HI            0x00004000    /* POLS: FS1 is active low. FS2 is active high */
 |