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+/*
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+ * TI DaVinci DM365 EVM board support
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+ *
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+ * Copyright (C) 2009 Texas Instruments Incorporated
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation version 2.
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+ *
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+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
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+ * kind, whether express or implied; without even the implied warranty
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+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/err.h>
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+#include <linux/i2c.h>
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+#include <linux/io.h>
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+#include <linux/clk.h>
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+#include <linux/i2c/at24.h>
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+#include <linux/leds.h>
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+#include <linux/mtd/mtd.h>
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+#include <linux/mtd/partitions.h>
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+#include <linux/slab.h>
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+#include <linux/mtd/nand.h>
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+#include <linux/input.h>
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+#include <linux/spi/spi.h>
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+#include <linux/spi/eeprom.h>
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+
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+#include <asm/mach-types.h>
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+#include <asm/mach/arch.h>
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+
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+#include <mach/mux.h>
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+#include <mach/common.h>
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+#include <linux/platform_data/i2c-davinci.h>
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+#include <mach/serial.h>
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+#include <linux/platform_data/mmc-davinci.h>
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+#include <linux/platform_data/mtd-davinci.h>
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+#include <linux/platform_data/keyscan-davinci.h>
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+
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+#include <media/tvp514x.h>
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+
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+#include "davinci.h"
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+
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+static inline int have_imager(void)
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+{
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+ /* REVISIT when it's supported, trigger via Kconfig */
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+ return 0;
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+}
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+
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+static inline int have_tvp7002(void)
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+{
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+ /* REVISIT when it's supported, trigger via Kconfig */
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+ return 0;
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+}
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+
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+#define DM365_EVM_PHY_ID "davinci_mdio-0:01"
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+/*
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+ * A MAX-II CPLD is used for various board control functions.
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+ */
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+#define CPLD_OFFSET(a13a8,a2a1) (((a13a8) << 10) + ((a2a1) << 3))
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+
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+#define CPLD_VERSION CPLD_OFFSET(0,0) /* r/o */
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+#define CPLD_TEST CPLD_OFFSET(0,1)
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+#define CPLD_LEDS CPLD_OFFSET(0,2)
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+#define CPLD_MUX CPLD_OFFSET(0,3)
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+#define CPLD_SWITCH CPLD_OFFSET(1,0) /* r/o */
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+#define CPLD_POWER CPLD_OFFSET(1,1)
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+#define CPLD_VIDEO CPLD_OFFSET(1,2)
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+#define CPLD_CARDSTAT CPLD_OFFSET(1,3) /* r/o */
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+
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+#define CPLD_DILC_OUT CPLD_OFFSET(2,0)
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+#define CPLD_DILC_IN CPLD_OFFSET(2,1) /* r/o */
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+
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+#define CPLD_IMG_DIR0 CPLD_OFFSET(2,2)
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+#define CPLD_IMG_MUX0 CPLD_OFFSET(2,3)
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+#define CPLD_IMG_MUX1 CPLD_OFFSET(3,0)
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+#define CPLD_IMG_DIR1 CPLD_OFFSET(3,1)
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+#define CPLD_IMG_MUX2 CPLD_OFFSET(3,2)
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+#define CPLD_IMG_MUX3 CPLD_OFFSET(3,3)
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+#define CPLD_IMG_DIR2 CPLD_OFFSET(4,0)
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+#define CPLD_IMG_MUX4 CPLD_OFFSET(4,1)
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+#define CPLD_IMG_MUX5 CPLD_OFFSET(4,2)
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+
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+#define CPLD_RESETS CPLD_OFFSET(4,3)
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+
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+#define CPLD_CCD_DIR1 CPLD_OFFSET(0x3e,0)
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+#define CPLD_CCD_IO1 CPLD_OFFSET(0x3e,1)
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+#define CPLD_CCD_DIR2 CPLD_OFFSET(0x3e,2)
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+#define CPLD_CCD_IO2 CPLD_OFFSET(0x3e,3)
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+#define CPLD_CCD_DIR3 CPLD_OFFSET(0x3f,0)
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+#define CPLD_CCD_IO3 CPLD_OFFSET(0x3f,1)
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+
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+static void __iomem *cpld;
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+
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+
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+/* NOTE: this is geared for the standard config, with a socketed
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+ * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
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+ * swap chips with a different block size, partitioning will
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+ * need to be changed. This NAND chip MT29F16G08FAA is the default
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