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@@ -1356,3 +1356,110 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
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.bus_num = 0,
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.chip_select = 5, /* CS, change it for your board */
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.platform_data = NULL, /* No spi_driver specific config */
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+ .mode = SPI_MODE_3,
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+ .irq = IRQ_PF4,
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+ },
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+#endif
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+#if defined(CONFIG_ADIS16260) \
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+ || defined(CONFIG_ADIS16260_MODULE)
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+ {
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+ .modalias = "adis16260",
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+ .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
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+ .bus_num = 0,
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+ .chip_select = 5, /* CS, change it for your board */
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+ .platform_data = NULL, /* No spi_driver specific config */
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+ .mode = SPI_MODE_3,
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+ .irq = IRQ_PF4,
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+ },
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+#endif
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+#if defined(CONFIG_ADIS16261) \
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+ || defined(CONFIG_ADIS16261_MODULE)
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+ {
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+ .modalias = "adis16261",
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+ .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
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+ .bus_num = 0,
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+ .chip_select = 1, /* CS, change it for your board */
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+ .platform_data = NULL, /* No spi_driver specific config */
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+ .mode = SPI_MODE_3,
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+ },
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+#endif
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+#if defined(CONFIG_ADIS16300) \
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+ || defined(CONFIG_ADIS16300_MODULE)
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+ {
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+ .modalias = "adis16300",
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+ .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
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+ .bus_num = 0,
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+ .chip_select = 5, /* CS, change it for your board */
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+ .platform_data = NULL, /* No spi_driver specific config */
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+ .mode = SPI_MODE_3,
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+ .irq = IRQ_PF4,
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+ },
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+#endif
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+#if defined(CONFIG_ADIS16350) \
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+ || defined(CONFIG_ADIS16350_MODULE)
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+ {
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+ .modalias = "adis16364",
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+ .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
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+ .bus_num = 0,
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+ .chip_select = 5, /* CS, change it for your board */
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+ .platform_data = NULL, /* No spi_driver specific config */
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+ .mode = SPI_MODE_3,
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+ .irq = IRQ_PF4,
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+ },
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+#endif
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+#if defined(CONFIG_ADIS16400) \
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+ || defined(CONFIG_ADIS16400_MODULE)
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+ {
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+ .modalias = "adis16400",
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+ .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
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+ .bus_num = 0,
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+ .chip_select = 1, /* CS, change it for your board */
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+ .platform_data = NULL, /* No spi_driver specific config */
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+ .mode = SPI_MODE_3,
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+ },
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+#endif
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+};
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+
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+#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
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+/* SPI controller data */
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+static struct bfin5xx_spi_master bfin_spi0_info = {
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+ .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
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+ .enable_dma = 1, /* master has the ability to do dma transfer */
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+ .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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+};
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+
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+/* SPI (0) */
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+static struct resource bfin_spi0_resource[] = {
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+ [0] = {
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+ .start = SPI0_REGBASE,
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+ .end = SPI0_REGBASE + 0xFF,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = CH_SPI,
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+ .end = CH_SPI,
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+ .flags = IORESOURCE_DMA,
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+ },
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+ [2] = {
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+ .start = IRQ_SPI,
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+ .end = IRQ_SPI,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device bfin_spi0_device = {
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+ .name = "bfin-spi",
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+ .id = 0, /* Bus number */
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+ .num_resources = ARRAY_SIZE(bfin_spi0_resource),
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+ .resource = bfin_spi0_resource,
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+ .dev = {
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+ .platform_data = &bfin_spi0_info, /* Passed to driver */
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+ },
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+};
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+#endif /* spi master and devices */
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+
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+#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
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+
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+/* SPORT SPI controller data */
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+static struct bfin5xx_spi_master bfin_sport_spi0_info = {
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+ .num_chipselect = MAX_BLACKFIN_GPIOS,
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