|  | @@ -0,0 +1,156 @@
 | 
	
		
			
				|  |  | +/* linux/arch/arm/plat-s3c24xx/s3c2410-iotiming.c
 | 
	
		
			
				|  |  | + *
 | 
	
		
			
				|  |  | + * Copyright (c) 2006-2009 Simtec Electronics
 | 
	
		
			
				|  |  | + *	http://armlinux.simtec.co.uk/
 | 
	
		
			
				|  |  | + *	Ben Dooks <ben@simtec.co.uk>
 | 
	
		
			
				|  |  | + *
 | 
	
		
			
				|  |  | + * S3C24XX CPU Frequency scaling - IO timing for S3C2410/S3C2440/S3C2442
 | 
	
		
			
				|  |  | + *
 | 
	
		
			
				|  |  | + * This program is free software; you can redistribute it and/or modify
 | 
	
		
			
				|  |  | + * it under the terms of the GNU General Public License version 2 as
 | 
	
		
			
				|  |  | + * published by the Free Software Foundation.
 | 
	
		
			
				|  |  | +*/
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +#include <linux/init.h>
 | 
	
		
			
				|  |  | +#include <linux/kernel.h>
 | 
	
		
			
				|  |  | +#include <linux/errno.h>
 | 
	
		
			
				|  |  | +#include <linux/cpufreq.h>
 | 
	
		
			
				|  |  | +#include <linux/seq_file.h>
 | 
	
		
			
				|  |  | +#include <linux/io.h>
 | 
	
		
			
				|  |  | +#include <linux/slab.h>
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +#include <mach/map.h>
 | 
	
		
			
				|  |  | +#include <mach/regs-mem.h>
 | 
	
		
			
				|  |  | +#include <mach/regs-clock.h>
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +#include <plat/cpu-freq-core.h>
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +#define print_ns(x) ((x) / 10), ((x) % 10)
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +/**
 | 
	
		
			
				|  |  | + * s3c2410_print_timing - print bank timing data for debug purposes
 | 
	
		
			
				|  |  | + * @pfx: The prefix to put on the output
 | 
	
		
			
				|  |  | + * @timings: The timing inforamtion to print.
 | 
	
		
			
				|  |  | +*/
 | 
	
		
			
				|  |  | +static void s3c2410_print_timing(const char *pfx,
 | 
	
		
			
				|  |  | +				 struct s3c_iotimings *timings)
 | 
	
		
			
				|  |  | +{
 | 
	
		
			
				|  |  | +	struct s3c2410_iobank_timing *bt;
 | 
	
		
			
				|  |  | +	int bank;
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +	for (bank = 0; bank < MAX_BANKS; bank++) {
 | 
	
		
			
				|  |  | +		bt = timings->bank[bank].io_2410;
 | 
	
		
			
				|  |  | +		if (!bt)
 | 
	
		
			
				|  |  | +			continue;
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +		printk(KERN_DEBUG "%s %d: Tacs=%d.%d, Tcos=%d.%d, Tacc=%d.%d, "
 | 
	
		
			
				|  |  | +		       "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank,
 | 
	
		
			
				|  |  | +		       print_ns(bt->tacs),
 | 
	
		
			
				|  |  | +		       print_ns(bt->tcos),
 | 
	
		
			
				|  |  | +		       print_ns(bt->tacc),
 | 
	
		
			
				|  |  | +		       print_ns(bt->tcoh),
 | 
	
		
			
				|  |  | +		       print_ns(bt->tcah));
 | 
	
		
			
				|  |  | +	}
 | 
	
		
			
				|  |  | +}
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +/**
 | 
	
		
			
				|  |  | + * bank_reg - convert bank number to pointer to the control register.
 | 
	
		
			
				|  |  | + * @bank: The IO bank number.
 | 
	
		
			
				|  |  | + */
 | 
	
		
			
				|  |  | +static inline void __iomem *bank_reg(unsigned int bank)
 | 
	
		
			
				|  |  | +{
 | 
	
		
			
				|  |  | +	return S3C2410_BANKCON0 + (bank << 2);
 | 
	
		
			
				|  |  | +}
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +/**
 | 
	
		
			
				|  |  | + * bank_is_io - test whether bank is used for IO
 | 
	
		
			
				|  |  | + * @bankcon: The bank control register.
 | 
	
		
			
				|  |  | + *
 | 
	
		
			
				|  |  | + * This is a simplistic test to see if any BANKCON[x] is not an IO
 | 
	
		
			
				|  |  | + * bank. It currently does not take into account whether BWSCON has
 | 
	
		
			
				|  |  | + * an illegal width-setting in it, or if the pin connected to nCS[x]
 | 
	
		
			
				|  |  | + * is actually being handled as a chip-select.
 | 
	
		
			
				|  |  | + */
 | 
	
		
			
				|  |  | +static inline int bank_is_io(unsigned long bankcon)
 | 
	
		
			
				|  |  | +{
 | 
	
		
			
				|  |  | +	return !(bankcon & S3C2410_BANKCON_SDRAM);
 | 
	
		
			
				|  |  | +}
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +/**
 | 
	
		
			
				|  |  | + * to_div - convert cycle time to divisor
 | 
	
		
			
				|  |  | + * @cyc: The cycle time, in 10ths of nanoseconds.
 | 
	
		
			
				|  |  | + * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds.
 | 
	
		
			
				|  |  | + *
 | 
	
		
			
				|  |  | + * Convert the given cycle time into the divisor to use to obtain it from
 | 
	
		
			
				|  |  | + * HCLK.
 | 
	
		
			
				|  |  | +*/
 | 
	
		
			
				|  |  | +static inline unsigned int to_div(unsigned int cyc, unsigned int hclk_tns)
 | 
	
		
			
				|  |  | +{
 | 
	
		
			
				|  |  | +	if (cyc == 0)
 | 
	
		
			
				|  |  | +		return 0;
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +	return DIV_ROUND_UP(cyc, hclk_tns);
 | 
	
		
			
				|  |  | +}
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +/**
 | 
	
		
			
				|  |  | + * calc_0124 - calculate divisor control for divisors that do /0, /1. /2 and /4
 | 
	
		
			
				|  |  | + * @cyc: The cycle time, in 10ths of nanoseconds.
 | 
	
		
			
				|  |  | + * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds.
 | 
	
		
			
				|  |  | + * @v: Pointer to register to alter.
 | 
	
		
			
				|  |  | + * @shift: The shift to get to the control bits.
 | 
	
		
			
				|  |  | + *
 | 
	
		
			
				|  |  | + * Calculate the divisor, and turn it into the correct control bits to
 | 
	
		
			
				|  |  | + * set in the result, @v.
 | 
	
		
			
				|  |  | + */
 | 
	
		
			
				|  |  | +static unsigned int calc_0124(unsigned int cyc, unsigned long hclk_tns,
 | 
	
		
			
				|  |  | +			      unsigned long *v, int shift)
 | 
	
		
			
				|  |  | +{
 | 
	
		
			
				|  |  | +	unsigned int div = to_div(cyc, hclk_tns);
 | 
	
		
			
				|  |  | +	unsigned long val;
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +	s3c_freq_iodbg("%s: cyc=%d, hclk=%lu, shift=%d => div %d\n",
 | 
	
		
			
				|  |  | +		       __func__, cyc, hclk_tns, shift, div);
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +	switch (div) {
 | 
	
		
			
				|  |  | +	case 0:
 | 
	
		
			
				|  |  | +		val = 0;
 | 
	
		
			
				|  |  | +		break;
 | 
	
		
			
				|  |  | +	case 1:
 | 
	
		
			
				|  |  | +		val = 1;
 | 
	
		
			
				|  |  | +		break;
 | 
	
		
			
				|  |  | +	case 2:
 | 
	
		
			
				|  |  | +		val = 2;
 | 
	
		
			
				|  |  | +		break;
 | 
	
		
			
				|  |  | +	case 3:
 | 
	
		
			
				|  |  | +	case 4:
 | 
	
		
			
				|  |  | +		val = 3;
 | 
	
		
			
				|  |  | +		break;
 | 
	
		
			
				|  |  | +	default:
 | 
	
		
			
				|  |  | +		return -1;
 | 
	
		
			
				|  |  | +	}
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +	*v |= val << shift;
 | 
	
		
			
				|  |  | +	return 0;
 | 
	
		
			
				|  |  | +}
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +int calc_tacp(unsigned int cyc, unsigned long hclk, unsigned long *v)
 | 
	
		
			
				|  |  | +{
 | 
	
		
			
				|  |  | +	/* Currently no support for Tacp calculations. */
 | 
	
		
			
				|  |  | +	return 0;
 | 
	
		
			
				|  |  | +}
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +/**
 | 
	
		
			
				|  |  | + * calc_tacc - calculate divisor control for tacc.
 | 
	
		
			
				|  |  | + * @cyc: The cycle time, in 10ths of nanoseconds.
 | 
	
		
			
				|  |  | + * @nwait_en: IS nWAIT enabled for this bank.
 | 
	
		
			
				|  |  | + * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds.
 | 
	
		
			
				|  |  | + * @v: Pointer to register to alter.
 | 
	
		
			
				|  |  | + *
 | 
	
		
			
				|  |  | + * Calculate the divisor control for tACC, taking into account whether
 | 
	
		
			
				|  |  | + * the bank has nWAIT enabled. The result is used to modify the value
 | 
	
		
			
				|  |  | + * pointed to by @v.
 | 
	
		
			
				|  |  | +*/
 | 
	
		
			
				|  |  | +static int calc_tacc(unsigned int cyc, int nwait_en,
 | 
	
		
			
				|  |  | +		     unsigned long hclk_tns, unsigned long *v)
 | 
	
		
			
				|  |  | +{
 | 
	
		
			
				|  |  | +	unsigned int div = to_div(cyc, hclk_tns);
 |