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				+/* linux/arch/arm/plat-s3c24xx/s3c2410-iotiming.c 
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				+ * 
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				+ * Copyright (c) 2006-2009 Simtec Electronics 
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				+ *	http://armlinux.simtec.co.uk/ 
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				+ *	Ben Dooks <ben@simtec.co.uk> 
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				+ * 
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				+ * S3C24XX CPU Frequency scaling - IO timing for S3C2410/S3C2440/S3C2442 
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				+ * 
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				+ * This program is free software; you can redistribute it and/or modify 
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				+ * it under the terms of the GNU General Public License version 2 as 
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				+ * published by the Free Software Foundation. 
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				+*/ 
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				+ 
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				+#include <linux/init.h> 
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				+#include <linux/kernel.h> 
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				+#include <linux/errno.h> 
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				+#include <linux/cpufreq.h> 
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				+#include <linux/seq_file.h> 
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				+#include <linux/io.h> 
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				+#include <linux/slab.h> 
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				+ 
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				+#include <mach/map.h> 
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				+#include <mach/regs-mem.h> 
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				+#include <mach/regs-clock.h> 
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				+ 
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				+#include <plat/cpu-freq-core.h> 
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				+ 
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				+#define print_ns(x) ((x) / 10), ((x) % 10) 
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				+ 
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				+/** 
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				+ * s3c2410_print_timing - print bank timing data for debug purposes 
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				+ * @pfx: The prefix to put on the output 
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				+ * @timings: The timing inforamtion to print. 
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				+*/ 
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				+static void s3c2410_print_timing(const char *pfx, 
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				+				 struct s3c_iotimings *timings) 
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				+{ 
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				+	struct s3c2410_iobank_timing *bt; 
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				+	int bank; 
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				+ 
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				+	for (bank = 0; bank < MAX_BANKS; bank++) { 
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				+		bt = timings->bank[bank].io_2410; 
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				+		if (!bt) 
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				+			continue; 
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				+ 
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				+		printk(KERN_DEBUG "%s %d: Tacs=%d.%d, Tcos=%d.%d, Tacc=%d.%d, " 
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				+		       "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank, 
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				+		       print_ns(bt->tacs), 
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				+		       print_ns(bt->tcos), 
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				+		       print_ns(bt->tacc), 
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				+		       print_ns(bt->tcoh), 
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				+		       print_ns(bt->tcah)); 
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				+	} 
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				+} 
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				+ 
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				+/** 
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				+ * bank_reg - convert bank number to pointer to the control register. 
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				+ * @bank: The IO bank number. 
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				+ */ 
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				+static inline void __iomem *bank_reg(unsigned int bank) 
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				+{ 
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				+	return S3C2410_BANKCON0 + (bank << 2); 
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				+} 
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				+ 
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				+/** 
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				+ * bank_is_io - test whether bank is used for IO 
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				+ * @bankcon: The bank control register. 
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				+ * 
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				+ * This is a simplistic test to see if any BANKCON[x] is not an IO 
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				+ * bank. It currently does not take into account whether BWSCON has 
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				+ * an illegal width-setting in it, or if the pin connected to nCS[x] 
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				+ * is actually being handled as a chip-select. 
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				+ */ 
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				+static inline int bank_is_io(unsigned long bankcon) 
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				+{ 
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				+	return !(bankcon & S3C2410_BANKCON_SDRAM); 
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				+} 
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				+ 
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				+/** 
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				+ * to_div - convert cycle time to divisor 
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				+ * @cyc: The cycle time, in 10ths of nanoseconds. 
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				+ * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. 
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				+ * 
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				+ * Convert the given cycle time into the divisor to use to obtain it from 
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				+ * HCLK. 
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				+*/ 
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				+static inline unsigned int to_div(unsigned int cyc, unsigned int hclk_tns) 
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				+{ 
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				+	if (cyc == 0) 
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				+		return 0; 
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				+ 
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				+	return DIV_ROUND_UP(cyc, hclk_tns); 
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				+} 
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				+ 
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				+/** 
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				+ * calc_0124 - calculate divisor control for divisors that do /0, /1. /2 and /4 
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				+ * @cyc: The cycle time, in 10ths of nanoseconds. 
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				+ * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. 
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				+ * @v: Pointer to register to alter. 
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				+ * @shift: The shift to get to the control bits. 
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				+ * 
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				+ * Calculate the divisor, and turn it into the correct control bits to 
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				+ * set in the result, @v. 
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				+ */ 
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				+static unsigned int calc_0124(unsigned int cyc, unsigned long hclk_tns, 
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				+			      unsigned long *v, int shift) 
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				+{ 
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				+	unsigned int div = to_div(cyc, hclk_tns); 
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				+	unsigned long val; 
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				+ 
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				+	s3c_freq_iodbg("%s: cyc=%d, hclk=%lu, shift=%d => div %d\n", 
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				+		       __func__, cyc, hclk_tns, shift, div); 
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				+ 
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				+	switch (div) { 
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				+	case 0: 
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				+		val = 0; 
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				+		break; 
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				+	case 1: 
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				+		val = 1; 
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				+		break; 
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				+	case 2: 
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				+		val = 2; 
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				+		break; 
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				+	case 3: 
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				+	case 4: 
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				+		val = 3; 
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				+		break; 
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				+	default: 
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				+		return -1; 
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				+	} 
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				+ 
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				+	*v |= val << shift; 
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				+	return 0; 
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				+} 
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				+ 
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				+int calc_tacp(unsigned int cyc, unsigned long hclk, unsigned long *v) 
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				+{ 
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				+	/* Currently no support for Tacp calculations. */ 
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				+	return 0; 
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				+} 
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				+ 
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				+/** 
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				+ * calc_tacc - calculate divisor control for tacc. 
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				+ * @cyc: The cycle time, in 10ths of nanoseconds. 
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				+ * @nwait_en: IS nWAIT enabled for this bank. 
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				+ * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. 
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				+ * @v: Pointer to register to alter. 
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				+ * 
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				+ * Calculate the divisor control for tACC, taking into account whether 
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				+ * the bank has nWAIT enabled. The result is used to modify the value 
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				+ * pointed to by @v. 
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				+*/ 
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				+static int calc_tacc(unsigned int cyc, int nwait_en, 
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				+		     unsigned long hclk_tns, unsigned long *v) 
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				+{ 
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				+	unsigned int div = to_div(cyc, hclk_tns); 
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