|  | @@ -1545,3 +1545,88 @@ typedef union  pal_version_u {
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				|  |  |  		u64	pv_pal_a_model		:	8;
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				|  |  |  		u64	pv_reserved2		:	16;
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				|  |  |  	} pal_version_s;
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				|  |  | +} pal_version_u_t;
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				|  |  | +
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * Return PAL version information.  While the documentation states that
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				|  |  | + * PAL_VERSION can be called in either physical or virtual mode, some
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				|  |  | + * implementations only allow physical calls.  We don't call it very often,
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				|  |  | + * so the overhead isn't worth eliminating.
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				|  |  | + */
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				|  |  | +static inline s64
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				|  |  | +ia64_pal_version (pal_version_u_t *pal_min_version, pal_version_u_t *pal_cur_version)
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				|  |  | +{
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				|  |  | +	struct ia64_pal_retval iprv;
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				|  |  | +	PAL_CALL_PHYS(iprv, PAL_VERSION, 0, 0, 0);
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				|  |  | +	if (pal_min_version)
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				|  |  | +		pal_min_version->pal_version_val = iprv.v0;
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				|  |  | +
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				|  |  | +	if (pal_cur_version)
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				|  |  | +		pal_cur_version->pal_version_val = iprv.v1;
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				|  |  | +
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				|  |  | +	return iprv.status;
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				|  |  | +}
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				|  |  | +
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				|  |  | +typedef union pal_tc_info_u {
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				|  |  | +	u64			pti_val;
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				|  |  | +	struct {
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				|  |  | +	       u64		num_sets	:	8,
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				|  |  | +				associativity	:	8,
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				|  |  | +				num_entries	:	16,
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				|  |  | +				pf		:	1,
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				|  |  | +				unified		:	1,
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				|  |  | +				reduce_tr	:	1,
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				|  |  | +				reserved	:	29;
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				|  |  | +	} pal_tc_info_s;
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				|  |  | +} pal_tc_info_u_t;
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				|  |  | +
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				|  |  | +#define tc_reduce_tr		pal_tc_info_s.reduce_tr
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				|  |  | +#define tc_unified		pal_tc_info_s.unified
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				|  |  | +#define tc_pf			pal_tc_info_s.pf
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				|  |  | +#define tc_num_entries		pal_tc_info_s.num_entries
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				|  |  | +#define tc_associativity	pal_tc_info_s.associativity
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				|  |  | +#define tc_num_sets		pal_tc_info_s.num_sets
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				|  |  | +
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				|  |  | +
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				|  |  | +/* Return information about the virtual memory characteristics of the processor
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				|  |  | + * implementation.
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				|  |  | + */
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				|  |  | +static inline s64
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				|  |  | +ia64_pal_vm_info (u64 tc_level, u64 tc_type,  pal_tc_info_u_t *tc_info, u64 *tc_pages)
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				|  |  | +{
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				|  |  | +	struct ia64_pal_retval iprv;
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				|  |  | +	PAL_CALL(iprv, PAL_VM_INFO, tc_level, tc_type, 0);
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				|  |  | +	if (tc_info)
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				|  |  | +		tc_info->pti_val = iprv.v0;
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				|  |  | +	if (tc_pages)
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				|  |  | +		*tc_pages = iprv.v1;
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				|  |  | +	return iprv.status;
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				|  |  | +}
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				|  |  | +
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				|  |  | +/* Get page size information about the virtual memory characteristics of the processor
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				|  |  | + * implementation.
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				|  |  | + */
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				|  |  | +static inline s64 ia64_pal_vm_page_size(u64 *tr_pages, u64 *vw_pages)
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				|  |  | +{
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				|  |  | +	struct ia64_pal_retval iprv;
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				|  |  | +	PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0);
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				|  |  | +	if (tr_pages)
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				|  |  | +		*tr_pages = iprv.v0;
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				|  |  | +	if (vw_pages)
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				|  |  | +		*vw_pages = iprv.v1;
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				|  |  | +	return iprv.status;
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				|  |  | +}
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				|  |  | +
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				|  |  | +typedef union pal_vm_info_1_u {
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				|  |  | +	u64			pvi1_val;
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				|  |  | +	struct {
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				|  |  | +		u64		vw		: 1,
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				|  |  | +				phys_add_size	: 7,
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				|  |  | +				key_size	: 8,
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				|  |  | +				max_pkr		: 8,
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				|  |  | +				hash_tag_id	: 8,
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				|  |  | +				max_dtr_entry	: 8,
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				|  |  | +				max_itr_entry	: 8,
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				|  |  | +				max_unique_tcs	: 8,
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				|  |  | +				num_tc_levels	: 8;
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