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@@ -1302,3 +1302,58 @@ static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap
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{
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struct omap_hwmod_ocp_if *os;
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struct omap_hwmod_addr_space *mem;
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+ int found = 0, i = 0;
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+
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+ os = _find_mpu_rt_port(oh);
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+ if (!os || !os->addr)
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+ return NULL;
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+
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+ do {
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+ mem = &os->addr[i++];
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+ if (mem->flags & ADDR_TYPE_RT)
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+ found = 1;
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+ } while (!found && mem->pa_start != mem->pa_end);
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+
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+ return (found) ? mem : NULL;
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+}
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+
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+/**
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+ * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
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+ * @oh: struct omap_hwmod *
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+ *
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+ * Ensure that the OCP_SYSCONFIG register for the IP block represented
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+ * by @oh is set to indicate to the PRCM that the IP block is active.
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+ * Usually this means placing the module into smart-idle mode and
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+ * smart-standby, but if there is a bug in the automatic idle handling
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+ * for the IP block, it may need to be placed into the force-idle or
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+ * no-idle variants of these modes. No return value.
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+ */
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+static void _enable_sysc(struct omap_hwmod *oh)
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+{
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+ u8 idlemode, sf;
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+ u32 v;
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+ bool clkdm_act;
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+ struct clockdomain *clkdm;
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+
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+ if (!oh->class->sysc)
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+ return;
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+
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+ /*
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+ * Wait until reset has completed, this is needed as the IP
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+ * block is reset automatically by hardware in some cases
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+ * (off-mode for example), and the drivers require the
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+ * IP to be ready when they access it
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+ */
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+ if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
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+ _enable_optional_clocks(oh);
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+ _wait_softreset_complete(oh);
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+ if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
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+ _disable_optional_clocks(oh);
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+
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+ v = oh->_sysc_cache;
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+ sf = oh->class->sysc->sysc_flags;
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+
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+ clkdm = _get_clkdm(oh);
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+ if (sf & SYSC_HAS_SIDLEMODE) {
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+ clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
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+ if (clkdm_act && !(oh->class->sysc->idlemodes &
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