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@@ -2485,3 +2485,119 @@ static struct omap_hwmod_addr_space am33xx_adc_tsc_addrs[] = {
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static struct omap_hwmod_ocp_if am33xx_l4_wkup__adc_tsc = {
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static struct omap_hwmod_ocp_if am33xx_l4_wkup__adc_tsc = {
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.master = &am33xx_l4_wkup_hwmod,
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.master = &am33xx_l4_wkup_hwmod,
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+ .slave = &am33xx_adc_tsc_hwmod,
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+ .clk = "dpll_core_m4_div2_ck",
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+ .addr = am33xx_adc_tsc_addrs,
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+ .user = OCP_USER_MPU,
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+};
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+
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+static struct omap_hwmod_addr_space am33xx_cpgmac0_addr_space[] = {
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+ /* cpsw ss */
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+ {
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+ .pa_start = 0x4a100000,
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+ .pa_end = 0x4a100000 + SZ_2K - 1,
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+ .flags = ADDR_TYPE_RT,
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+ },
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+ /* cpsw wr */
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+ {
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+ .pa_start = 0x4a101200,
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+ .pa_end = 0x4a101200 + SZ_256 - 1,
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+ .flags = ADDR_TYPE_RT,
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
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+ .master = &am33xx_l4_hs_hwmod,
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+ .slave = &am33xx_cpgmac0_hwmod,
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+ .clk = "cpsw_125mhz_gclk",
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+ .addr = am33xx_cpgmac0_addr_space,
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+ .user = OCP_USER_MPU,
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+};
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+
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+static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
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+ {
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+ .pa_start = 0x4A101000,
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+ .pa_end = 0x4A101000 + SZ_256 - 1,
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
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+ .master = &am33xx_cpgmac0_hwmod,
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+ .slave = &am33xx_mdio_hwmod,
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+ .addr = am33xx_mdio_addr_space,
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+ .user = OCP_USER_MPU,
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+};
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+
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+static struct omap_hwmod_addr_space am33xx_elm_addr_space[] = {
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+ {
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+ .pa_start = 0x48080000,
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+ .pa_end = 0x48080000 + SZ_8K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if am33xx_l4_ls__elm = {
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+ .master = &am33xx_l4_ls_hwmod,
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+ .slave = &am33xx_elm_hwmod,
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+ .clk = "l4ls_gclk",
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+ .addr = am33xx_elm_addr_space,
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+ .user = OCP_USER_MPU,
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+};
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+
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+/*
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+ * Splitting the resources to handle access of PWMSS config space
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+ * and module specific part independently
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+ */
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+static struct omap_hwmod_addr_space am33xx_ehrpwm0_addr_space[] = {
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+ {
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+ .pa_start = 0x48300000,
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+ .pa_end = 0x48300000 + SZ_16 - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ {
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+ .pa_start = 0x48300200,
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+ .pa_end = 0x48300200 + SZ_256 - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if am33xx_l4_ls__ehrpwm0 = {
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+ .master = &am33xx_l4_ls_hwmod,
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+ .slave = &am33xx_ehrpwm0_hwmod,
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+ .clk = "l4ls_gclk",
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+ .addr = am33xx_ehrpwm0_addr_space,
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+ .user = OCP_USER_MPU,
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+};
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+
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+/*
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+ * Splitting the resources to handle access of PWMSS config space
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+ * and module specific part independently
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+ */
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+static struct omap_hwmod_addr_space am33xx_ehrpwm1_addr_space[] = {
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+ {
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+ .pa_start = 0x48302000,
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+ .pa_end = 0x48302000 + SZ_16 - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ {
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+ .pa_start = 0x48302200,
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+ .pa_end = 0x48302200 + SZ_256 - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if am33xx_l4_ls__ehrpwm1 = {
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+ .master = &am33xx_l4_ls_hwmod,
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+ .slave = &am33xx_ehrpwm1_hwmod,
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+ .clk = "l4ls_gclk",
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+ .addr = am33xx_ehrpwm1_addr_space,
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+ .user = OCP_USER_MPU,
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+};
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+
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+/*
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+ * Splitting the resources to handle access of PWMSS config space
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