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@@ -0,0 +1,72 @@
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+/*
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+ * 6522 Versatile Interface Adapter (VIA)
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+ *
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+ * There are two of these on the Mac II. Some IRQ's are vectored
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+ * via them as are assorted bits and bobs - eg rtc, adb. The picture
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+ * is a bit incomplete as the Mac documentation doesn't cover this well
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+ */
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+
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+#ifndef _ASM_MAC_VIA_H_
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+#define _ASM_MAC_VIA_H_
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+
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+/*
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+ * Base addresses for the VIAs. There are two in every machine,
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+ * although on some machines the second is an RBV or an OSS.
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+ * The OSS is different enough that it's handled separately.
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+ *
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+ * Do not use these values directly; use the via1 and via2 variables
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+ * instead (and don't forget to check rbv_present when using via2!)
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+ */
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+
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+#define VIA1_BASE (0x50F00000)
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+#define VIA2_BASE (0x50F02000)
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+#define RBV_BASE (0x50F26000)
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+
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+/*
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+ * Not all of these are true post MacII I think.
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+ * CSA: probably the ones CHRP marks as 'unused' change purposes
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+ * when the IWM becomes the SWIM.
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+ * http://www.rs6000.ibm.com/resource/technology/chrpio/via5.mak.html
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+ * ftp://ftp.austin.ibm.com/pub/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
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+ *
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+ * also, http://developer.apple.com/technotes/hw/hw_09.html claims the
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+ * following changes for IIfx:
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+ * VIA1A_vSccWrReq not available and that VIA1A_vSync has moved to an IOP.
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+ * Also, "All of the functionality of VIA2 has been moved to other chips".
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+ */
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+
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+#define VIA1A_vSccWrReq 0x80 /* SCC write. (input)
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+ * [CHRP] SCC WREQ: Reflects the state of the
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+ * Wait/Request pins from the SCC.
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+ * [Macintosh Family Hardware]
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+ * as CHRP on SE/30,II,IIx,IIcx,IIci.
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+ * on IIfx, "0 means an active request"
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+ */
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+#define VIA1A_vRev8 0x40 /* Revision 8 board ???
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+ * [CHRP] En WaitReqB: Lets the WaitReq_L
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+ * signal from port B of the SCC appear on
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+ * the PA7 input pin. Output.
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+ * [Macintosh Family] On the SE/30, this
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+ * is the bit to flip screen buffers.
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+ * 0=alternate, 1=main.
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+ * on II,IIx,IIcx,IIci,IIfx this is a bit
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+ * for Rev ID. 0=II,IIx, 1=IIcx,IIci,IIfx
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+ */
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+#define VIA1A_vHeadSel 0x20 /* Head select for IWM.
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+ * [CHRP] unused.
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+ * [Macintosh Family] "Floppy disk
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+ * state-control line SEL" on all but IIfx
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+ */
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+#define VIA1A_vOverlay 0x10 /* [Macintosh Family] On SE/30,II,IIx,IIcx
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+ * this bit enables the "Overlay" address
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+ * map in the address decoders as it is on
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+ * reset for mapping the ROM over the reset
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+ * vector. 1=use overlay map.
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+ * On the IIci,IIfx it is another bit of the
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+ * CPU ID: 0=normal IIci, 1=IIci with parity
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+ * feature or IIfx.
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+ * [CHRP] En WaitReqA: Lets the WaitReq_L
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+ * signal from port A of the SCC appear
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+ * on the PA7 input pin (CHRP). Output.
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+ * [MkLinux] "Drive Select"
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+ * (with 0x20 being 'disk head select')
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