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				|  |  | +/*
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				|  |  | + * Copyright 2004-2009 Analog Devices Inc.
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				|  |  | + *           2008-2009 Bluetechnix
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				|  |  | + *                2005 National ICT Australia (NICTA)
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				|  |  | + *                      Aidan Williams <aidan@nicta.com.au>
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				|  |  | + *
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				|  |  | + * Licensed under the GPL-2 or later.
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				|  |  | + */
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				|  |  | +
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				|  |  | +#include <linux/device.h>
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				|  |  | +#include <linux/etherdevice.h>
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				|  |  | +#include <linux/export.h>
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				|  |  | +#include <linux/platform_device.h>
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				|  |  | +#include <linux/mtd/mtd.h>
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				|  |  | +#include <linux/mtd/partitions.h>
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				|  |  | +#include <linux/mtd/physmap.h>
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				|  |  | +#include <linux/spi/spi.h>
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				|  |  | +#include <linux/spi/flash.h>
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				|  |  | +#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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				|  |  | +#include <linux/usb/isp1362.h>
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				|  |  | +#endif
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				|  |  | +#include <linux/ata_platform.h>
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				|  |  | +#include <linux/irq.h>
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				|  |  | +#include <asm/dma.h>
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				|  |  | +#include <asm/bfin5xx_spi.h>
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				|  |  | +#include <asm/portmux.h>
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				|  |  | +#include <asm/dpmc.h>
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				|  |  | +#include <linux/spi/mmc_spi.h>
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * Name the Board for the /proc/cpuinfo
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				|  |  | + */
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				|  |  | +const char bfin_board_name[] = "Bluetechnix CM BF537U";
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				|  |  | +
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				|  |  | +#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
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				|  |  | +/* all SPI peripherals info goes here */
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				|  |  | +
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				|  |  | +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
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				|  |  | +static struct mtd_partition bfin_spi_flash_partitions[] = {
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				|  |  | +	{
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				|  |  | +		.name = "bootloader(spi)",
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				|  |  | +		.size = 0x00020000,
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				|  |  | +		.offset = 0,
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				|  |  | +		.mask_flags = MTD_CAP_ROM
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				|  |  | +	}, {
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				|  |  | +		.name = "linux kernel(spi)",
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				|  |  | +		.size = 0xe0000,
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				|  |  | +		.offset = 0x20000
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				|  |  | +	}, {
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				|  |  | +		.name = "file system(spi)",
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				|  |  | +		.size = 0x700000,
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				|  |  | +		.offset = 0x00100000,
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				|  |  | +	}
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct flash_platform_data bfin_spi_flash_data = {
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				|  |  | +	.name = "m25p80",
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				|  |  | +	.parts = bfin_spi_flash_partitions,
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				|  |  | +	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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				|  |  | +	.type = "m25p64",
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				|  |  | +};
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				|  |  | +
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				|  |  | +/* SPI flash chip (m25p64) */
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				|  |  | +static struct bfin5xx_spi_chip spi_flash_chip_info = {
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				|  |  | +	.enable_dma = 0,         /* use dma transfer with this chip*/
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				|  |  | +};
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				|  |  | +#endif
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				|  |  | +
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				|  |  | +#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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				|  |  | +static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
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				|  |  | +	.enable_dma = 0,
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				|  |  | +};
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				|  |  | +#endif
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				|  |  | +
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				|  |  | +static struct spi_board_info bfin_spi_board_info[] __initdata = {
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				|  |  | +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
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				|  |  | +	{
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				|  |  | +		/* the modalias must be the same as spi device driver name */
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				|  |  | +		.modalias = "m25p80", /* Name of spi_driver for this device */
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				|  |  | +		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
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				|  |  | +		.bus_num = 0, /* Framework bus number */
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				|  |  | +		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
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				|  |  | +		.platform_data = &bfin_spi_flash_data,
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				|  |  | +		.controller_data = &spi_flash_chip_info,
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				|  |  | +		.mode = SPI_MODE_3,
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				|  |  | +	},
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				|  |  | +#endif
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				|  |  | +
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				|  |  | +#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
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				|  |  | +	{
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				|  |  | +		.modalias = "ad183x",
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				|  |  | +		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
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				|  |  | +		.bus_num = 0,
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				|  |  | +		.chip_select = 4,
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				|  |  | +	},
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				|  |  | +#endif
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				|  |  | +
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				|  |  | +#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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				|  |  | +	{
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				|  |  | +		.modalias = "mmc_spi",
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				|  |  | +		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
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				|  |  | +		.bus_num = 0,
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				|  |  | +		.chip_select = 1,
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				|  |  | +		.controller_data = &mmc_spi_chip_info,
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				|  |  | +		.mode = SPI_MODE_3,
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				|  |  | +	},
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				|  |  | +#endif
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				|  |  | +};
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				|  |  | +
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				|  |  | +/* SPI (0) */
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				|  |  | +static struct resource bfin_spi0_resource[] = {
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				|  |  | +	[0] = {
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				|  |  | +		.start = SPI0_REGBASE,
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				|  |  | +		.end   = SPI0_REGBASE + 0xFF,
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				|  |  | +		.flags = IORESOURCE_MEM,
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				|  |  | +		},
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				|  |  | +	[1] = {
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				|  |  | +		.start = CH_SPI,
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				|  |  | +		.end   = CH_SPI,
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				|  |  | +		.flags = IORESOURCE_DMA,
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				|  |  | +	},
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				|  |  | +	[2] = {
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				|  |  | +		.start = IRQ_SPI,
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				|  |  | +		.end   = IRQ_SPI,
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				|  |  | +		.flags = IORESOURCE_IRQ,
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				|  |  | +	},
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				|  |  | +};
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				|  |  | +
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				|  |  | +/* SPI controller data */
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				|  |  | +static struct bfin5xx_spi_master bfin_spi0_info = {
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				|  |  | +	.num_chipselect = 8,
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				|  |  | +	.enable_dma = 1,  /* master has the ability to do dma transfer */
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				|  |  | +	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct platform_device bfin_spi0_device = {
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				|  |  | +	.name = "bfin-spi",
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				|  |  | +	.id = 0, /* Bus number */
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				|  |  | +	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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				|  |  | +	.resource = bfin_spi0_resource,
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				|  |  | +	.dev = {
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				|  |  | +		.platform_data = &bfin_spi0_info, /* Passed to driver */
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				|  |  | +	},
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				|  |  | +};
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				|  |  | +#endif  /* spi master and devices */
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				|  |  | +
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				|  |  | +#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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				|  |  | +static struct platform_device rtc_device = {
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				|  |  | +	.name = "rtc-bfin",
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				|  |  | +	.id   = -1,
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				|  |  | +};
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				|  |  | +#endif
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				|  |  | +
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				|  |  | +#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
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