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+/*
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+ * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
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+ *
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+ * Copyright (C) 2009-2011 Nokia Corporation
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+ * Paul Walmsley
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * XXX handle crossbar/shared link difference for L3?
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+ * XXX these should be marked initdata for multi-OMAP kernels
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+ */
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+#include <asm/sizes.h>
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+
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+#include "omap_hwmod.h"
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+#include "l3_2xxx.h"
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+#include "l4_2xxx.h"
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+#include "serial.h"
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+
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+#include "omap_hwmod_common_data.h"
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+
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+static struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
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+ {
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+ .pa_start = OMAP2_UART1_BASE,
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+ .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
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+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
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+ {
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+ .pa_start = OMAP2_UART2_BASE,
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+ .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
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+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
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+ {
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+ .pa_start = OMAP2_UART3_BASE,
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+ .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
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+ .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
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+ {
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+ .pa_start = 0x4802a000,
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+ .pa_end = 0x4802a000 + SZ_1K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
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+ {
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+ .pa_start = 0x48078000,
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+ .pa_end = 0x48078000 + SZ_1K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
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+ {
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+ .pa_start = 0x4807a000,
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+ .pa_end = 0x4807a000 + SZ_1K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
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+ {
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+ .pa_start = 0x4807c000,
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+ .pa_end = 0x4807c000 + SZ_1K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
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+ {
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+ .pa_start = 0x4807e000,
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+ .pa_end = 0x4807e000 + SZ_1K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
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+ {
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+ .pa_start = 0x48080000,
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+ .pa_end = 0x48080000 + SZ_1K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
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+ {
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+ .pa_start = 0x48082000,
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+ .pa_end = 0x48082000 + SZ_1K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
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+ {
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+ .pa_start = 0x48084000,
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+ .pa_end = 0x48084000 + SZ_1K - 1,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
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+ {
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+ .name = "mpu",
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+ .pa_start = 0x48076000,
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+ .pa_end = 0x480760ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2_rng_addr_space[] = {
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+ {
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+ .pa_start = 0x480a0000,
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+ .pa_end = 0x480a004f,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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