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@@ -265,3 +265,94 @@
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#define OMAP24XX_CLKSEL_GPT3_SHIFT 4
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#define OMAP24XX_CLKSEL_GPT3_SHIFT 4
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#define OMAP24XX_CLKSEL_GPT3_MASK (0x3 << 4)
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#define OMAP24XX_CLKSEL_GPT3_MASK (0x3 << 4)
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#define OMAP24XX_CLKSEL_GPT2_SHIFT 2
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#define OMAP24XX_CLKSEL_GPT2_SHIFT 2
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+#define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2)
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+
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+/* CM_CLKSTCTRL_CORE */
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+#define OMAP24XX_AUTOSTATE_DSS_SHIFT 2
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+#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2)
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+#define OMAP24XX_AUTOSTATE_L4_SHIFT 1
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+#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1)
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+#define OMAP24XX_AUTOSTATE_L3_SHIFT 0
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+#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0)
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+
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+/* CM_FCLKEN_GFX */
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+#define OMAP24XX_EN_3D_SHIFT 2
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+#define OMAP24XX_EN_3D_MASK (1 << 2)
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+#define OMAP24XX_EN_2D_SHIFT 1
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+#define OMAP24XX_EN_2D_MASK (1 << 1)
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+
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+/* CM_ICLKEN_GFX specific bits */
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+
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+/* CM_IDLEST_GFX specific bits */
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+
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+/* CM_CLKSEL_GFX specific bits */
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+
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+/* CM_CLKSTCTRL_GFX */
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+#define OMAP24XX_AUTOSTATE_GFX_SHIFT 0
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+#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0)
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+
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+/* CM_FCLKEN_WKUP specific bits */
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+
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+/* CM_ICLKEN_WKUP specific bits */
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+#define OMAP2430_EN_ICR_SHIFT 6
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+#define OMAP2430_EN_ICR_MASK (1 << 6)
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+#define OMAP24XX_EN_OMAPCTRL_SHIFT 5
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+#define OMAP24XX_EN_OMAPCTRL_MASK (1 << 5)
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+#define OMAP24XX_EN_WDT1_SHIFT 4
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+#define OMAP24XX_EN_WDT1_MASK (1 << 4)
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+#define OMAP24XX_EN_32KSYNC_SHIFT 1
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+#define OMAP24XX_EN_32KSYNC_MASK (1 << 1)
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+
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+/* CM_IDLEST_WKUP specific bits */
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+#define OMAP2430_ST_ICR_SHIFT 6
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+#define OMAP2430_ST_ICR_MASK (1 << 6)
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+#define OMAP24XX_ST_OMAPCTRL_SHIFT 5
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+#define OMAP24XX_ST_OMAPCTRL_MASK (1 << 5)
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+#define OMAP24XX_ST_WDT1_SHIFT 4
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+#define OMAP24XX_ST_WDT1_MASK (1 << 4)
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+#define OMAP24XX_ST_MPU_WDT_SHIFT 3
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+#define OMAP24XX_ST_MPU_WDT_MASK (1 << 3)
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+#define OMAP24XX_ST_32KSYNC_SHIFT 1
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+#define OMAP24XX_ST_32KSYNC_MASK (1 << 1)
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+
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+/* CM_AUTOIDLE_WKUP */
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+#define OMAP24XX_AUTO_OMAPCTRL_MASK (1 << 5)
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+#define OMAP24XX_AUTO_WDT1_MASK (1 << 4)
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+#define OMAP24XX_AUTO_MPU_WDT_MASK (1 << 3)
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+#define OMAP24XX_AUTO_GPIOS_MASK (1 << 2)
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+#define OMAP24XX_AUTO_32KSYNC_MASK (1 << 1)
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+#define OMAP24XX_AUTO_GPT1_MASK (1 << 0)
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+
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+/* CM_CLKSEL_WKUP */
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+#define OMAP24XX_CLKSEL_GPT1_SHIFT 0
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+#define OMAP24XX_CLKSEL_GPT1_MASK (0x3 << 0)
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+
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+/* CM_CLKEN_PLL */
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+#define OMAP24XX_EN_54M_PLL_SHIFT 6
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+#define OMAP24XX_EN_54M_PLL_MASK (0x3 << 6)
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+#define OMAP24XX_EN_96M_PLL_SHIFT 2
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+#define OMAP24XX_EN_96M_PLL_MASK (0x3 << 2)
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+#define OMAP24XX_EN_DPLL_SHIFT 0
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+#define OMAP24XX_EN_DPLL_MASK (0x3 << 0)
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+
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+/* CM_IDLEST_CKGEN */
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+#define OMAP24XX_ST_54M_APLL_SHIFT 9
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+#define OMAP24XX_ST_54M_APLL_MASK (1 << 9)
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+#define OMAP24XX_ST_96M_APLL_SHIFT 8
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+#define OMAP24XX_ST_96M_APLL_MASK (1 << 8)
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+#define OMAP24XX_ST_54M_CLK_MASK (1 << 6)
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+#define OMAP24XX_ST_12M_CLK_MASK (1 << 5)
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+#define OMAP24XX_ST_48M_CLK_MASK (1 << 4)
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+#define OMAP24XX_ST_96M_CLK_MASK (1 << 2)
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+#define OMAP24XX_ST_CORE_CLK_SHIFT 0
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+#define OMAP24XX_ST_CORE_CLK_MASK (0x3 << 0)
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+
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+/* CM_AUTOIDLE_PLL */
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+#define OMAP24XX_AUTO_54M_SHIFT 6
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+#define OMAP24XX_AUTO_54M_MASK (0x3 << 6)
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+#define OMAP24XX_AUTO_96M_SHIFT 2
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+#define OMAP24XX_AUTO_96M_MASK (0x3 << 2)
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+#define OMAP24XX_AUTO_DPLL_SHIFT 0
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+#define OMAP24XX_AUTO_DPLL_MASK (0x3 << 0)
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+
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+/* CM_CLKSEL1_PLL */
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