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@@ -210,3 +210,58 @@ void edma_free_slot(unsigned slot);
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int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
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int edma_free_cont_slots(unsigned slot, int count);
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+/* calls that operate on part of a parameter RAM slot */
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+void edma_set_src(unsigned slot, dma_addr_t src_port,
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+ enum address_mode mode, enum fifo_width);
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+void edma_set_dest(unsigned slot, dma_addr_t dest_port,
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+ enum address_mode mode, enum fifo_width);
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+void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
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+void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
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+void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
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+void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
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+ u16 bcnt_rld, enum sync_dimension sync_mode);
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+void edma_link(unsigned from, unsigned to);
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+void edma_unlink(unsigned from);
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+
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+/* calls that operate on an entire parameter RAM slot */
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+void edma_write_slot(unsigned slot, const struct edmacc_param *params);
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+void edma_read_slot(unsigned slot, struct edmacc_param *params);
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+
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+/* channel control operations */
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+int edma_start(unsigned channel);
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+void edma_stop(unsigned channel);
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+void edma_clean_channel(unsigned channel);
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+void edma_clear_event(unsigned channel);
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+void edma_pause(unsigned channel);
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+void edma_resume(unsigned channel);
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+
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+struct edma_rsv_info {
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+
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+ const s16 (*rsv_chans)[2];
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+ const s16 (*rsv_slots)[2];
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+};
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+
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+/* platform_data for EDMA driver */
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+struct edma_soc_info {
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+
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+ /* how many dma resources of each type */
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+ unsigned n_channel;
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+ unsigned n_region;
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+ unsigned n_slot;
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+ unsigned n_tc;
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+ unsigned n_cc;
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+ /*
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+ * Default queue is expected to be a low-priority queue.
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+ * This way, long transfers on the default queue started
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+ * by the codec engine will not cause audio defects.
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+ */
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+ enum dma_event_q default_queue;
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+
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+ /* Resource reservation for other cores */
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+ struct edma_rsv_info *rsv;
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+
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+ const s8 (*queue_tc_mapping)[2];
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+ const s8 (*queue_priority_mapping)[2];
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+};
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+
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+#endif
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韩正义