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@@ -807,3 +807,156 @@ marvel_ioread8(void __iomem *xaddr)
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else if (__marvel_is_port_rtc(addr))
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return __marvel_rtc_io(0, addr, 0);
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else if (marvel_is_ioaddr(addr))
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+ return __kernel_ldbu(*(vucp)addr);
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+ else
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+ /* this should catch other legacy addresses
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+ that would normally fail on MARVEL,
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+ because there really is nothing there...
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+ */
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+ return ~0;
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+}
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+
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+void
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+marvel_iowrite8(u8 b, void __iomem *xaddr)
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+{
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+ unsigned long addr = (unsigned long) xaddr;
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+ if (__marvel_is_port_kbd(addr))
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+ return;
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+ else if (__marvel_is_port_rtc(addr))
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+ __marvel_rtc_io(b, addr, 1);
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+ else if (marvel_is_ioaddr(addr))
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+ __kernel_stb(b, *(vucp)addr);
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+}
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+
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+#ifndef CONFIG_ALPHA_GENERIC
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+EXPORT_SYMBOL(marvel_ioremap);
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+EXPORT_SYMBOL(marvel_iounmap);
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+EXPORT_SYMBOL(marvel_is_mmio);
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+EXPORT_SYMBOL(marvel_ioportmap);
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+EXPORT_SYMBOL(marvel_ioread8);
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+EXPORT_SYMBOL(marvel_iowrite8);
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+#endif
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+
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+/*
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+ * NUMA Support
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+ */
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+/**********
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+ * FIXME - for now each cpu is a node by itself
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+ * -- no real support for striped mode
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+ **********
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+ */
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+int
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+marvel_pa_to_nid(unsigned long pa)
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+{
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+ int cpuid;
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+
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+ if ((pa >> 43) & 1) /* I/O */
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+ cpuid = (~(pa >> 35) & 0xff);
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+ else /* mem */
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+ cpuid = ((pa >> 34) & 0x3) | ((pa >> (37 - 2)) & (0x1f << 2));
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+
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+ return marvel_cpuid_to_nid(cpuid);
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+}
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+
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+int
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+marvel_cpuid_to_nid(int cpuid)
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+{
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+ return cpuid;
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+}
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+
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+unsigned long
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+marvel_node_mem_start(int nid)
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+{
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+ unsigned long pa;
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+
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+ pa = (nid & 0x3) | ((nid & (0x1f << 2)) << 1);
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+ pa <<= 34;
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+
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+ return pa;
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+}
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+
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+unsigned long
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+marvel_node_mem_size(int nid)
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+{
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+ return 16UL * 1024 * 1024 * 1024; /* 16GB */
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+}
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+
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+
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+/*
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+ * AGP GART Support.
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+ */
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+#include <linux/agp_backend.h>
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+#include <asm/agp_backend.h>
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+#include <linux/slab.h>
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+#include <linux/delay.h>
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+
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+struct marvel_agp_aperture {
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+ struct pci_iommu_arena *arena;
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+ long pg_start;
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+ long pg_count;
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+};
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+
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+static int
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+marvel_agp_setup(alpha_agp_info *agp)
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+{
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+ struct marvel_agp_aperture *aper;
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+
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+ if (!alpha_agpgart_size)
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+ return -ENOMEM;
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+
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+ aper = kmalloc(sizeof(*aper), GFP_KERNEL);
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+ if (aper == NULL) return -ENOMEM;
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+
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+ aper->arena = agp->hose->sg_pci;
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+ aper->pg_count = alpha_agpgart_size / PAGE_SIZE;
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+ aper->pg_start = iommu_reserve(aper->arena, aper->pg_count,
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+ aper->pg_count - 1);
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+
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+ if (aper->pg_start < 0) {
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+ printk(KERN_ERR "Failed to reserve AGP memory\n");
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+ kfree(aper);
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+ return -ENOMEM;
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+ }
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+
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+ agp->aperture.bus_base =
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+ aper->arena->dma_base + aper->pg_start * PAGE_SIZE;
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+ agp->aperture.size = aper->pg_count * PAGE_SIZE;
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+ agp->aperture.sysdata = aper;
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+
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+ return 0;
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+}
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+
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+static void
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+marvel_agp_cleanup(alpha_agp_info *agp)
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+{
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+ struct marvel_agp_aperture *aper = agp->aperture.sysdata;
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+ int status;
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+
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+ status = iommu_release(aper->arena, aper->pg_start, aper->pg_count);
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+ if (status == -EBUSY) {
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+ printk(KERN_WARNING
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+ "Attempted to release bound AGP memory - unbinding\n");
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+ iommu_unbind(aper->arena, aper->pg_start, aper->pg_count);
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+ status = iommu_release(aper->arena, aper->pg_start,
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+ aper->pg_count);
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+ }
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+ if (status < 0)
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+ printk(KERN_ERR "Failed to release AGP memory\n");
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+
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+ kfree(aper);
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+ kfree(agp);
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+}
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+
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+static int
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+marvel_agp_configure(alpha_agp_info *agp)
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+{
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+ io7_ioport_csrs *csrs = ((struct io7_port *)agp->hose->sysdata)->csrs;
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+ struct io7 *io7 = ((struct io7_port *)agp->hose->sysdata)->io7;
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+ unsigned int new_rate = 0;
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+ unsigned long agp_pll;
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+
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+ /*
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+ * Check the requested mode against the PLL setting.
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+ * The agpgart_be code has not programmed the card yet,
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+ * so we can still tweak mode here.
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+ */
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