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@@ -344,3 +344,84 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
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.id = AT91SAM9G45_ID_PIODE,
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.regbase = AT91SAM9G45_BASE_PIOE,
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}
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+};
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+
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+/* --------------------------------------------------------------------
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+ * AT91SAM9G45 processor initialization
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+ * -------------------------------------------------------------------- */
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+
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+static void __init at91sam9g45_map_io(void)
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+{
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+ at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
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+}
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+
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+static void __init at91sam9g45_ioremap_registers(void)
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+{
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+ at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
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+ at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
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+ at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512);
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+ at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512);
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+ at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
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+ at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
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+ at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX);
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+}
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+
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+static void __init at91sam9g45_initialize(void)
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+{
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+ arm_pm_idle = at91sam9_idle;
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+ arm_pm_restart = at91sam9g45_restart;
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+ at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
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+
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+ /* Register GPIO subsystem */
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+ at91_gpio_init(at91sam9g45_gpio, 5);
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+}
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+
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+/* --------------------------------------------------------------------
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+ * Interrupt initialization
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+ * -------------------------------------------------------------------- */
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+
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+/*
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+ * The default interrupt priority levels (0 = lowest, 7 = highest).
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+ */
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+static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
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+ 7, /* Advanced Interrupt Controller (FIQ) */
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+ 7, /* System Peripherals */
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+ 1, /* Parallel IO Controller A */
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+ 1, /* Parallel IO Controller B */
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+ 1, /* Parallel IO Controller C */
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+ 1, /* Parallel IO Controller D and E */
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+ 0,
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+ 5, /* USART 0 */
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+ 5, /* USART 1 */
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+ 5, /* USART 2 */
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+ 5, /* USART 3 */
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+ 0, /* Multimedia Card Interface 0 */
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+ 6, /* Two-Wire Interface 0 */
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+ 6, /* Two-Wire Interface 1 */
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+ 5, /* Serial Peripheral Interface 0 */
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+ 5, /* Serial Peripheral Interface 1 */
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+ 4, /* Serial Synchronous Controller 0 */
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+ 4, /* Serial Synchronous Controller 1 */
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+ 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */
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+ 0, /* Pulse Width Modulation Controller */
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+ 0, /* Touch Screen Controller */
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+ 0, /* DMA Controller */
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+ 2, /* USB Host High Speed port */
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+ 3, /* LDC Controller */
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+ 5, /* AC97 Controller */
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+ 3, /* Ethernet */
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+ 0, /* Image Sensor Interface */
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+ 2, /* USB Device High speed port */
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+ 0, /* AESTDESSHA Crypto HW Accelerators */
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+ 0, /* Multimedia Card Interface 1 */
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+ 0,
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+ 0, /* Advanced Interrupt Controller (IRQ0) */
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+};
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+
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+AT91_SOC_START(sam9g45)
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+ .map_io = at91sam9g45_map_io,
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+ .default_irq_priority = at91sam9g45_default_irq_priority,
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+ .ioremap_registers = at91sam9g45_ioremap_registers,
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+ .register_clocks = at91sam9g45_register_clocks,
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+ .init = at91sam9g45_initialize,
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+AT91_SOC_END
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